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Nowadays vectors are only split if they have an even
number of elements. Make some simplifications based on this (in particular SplitVecRes_SETCC). Tighten up some checking while there. llvm-svn: 75050
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@ -732,6 +732,8 @@ void DAGTypeLegalizer::ReplaceValueWith(SDValue From, SDValue To) {
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}
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void DAGTypeLegalizer::SetPromotedInteger(SDValue Op, SDValue Result) {
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assert(Result.getValueType() == TLI.getTypeToTransformTo(Op.getValueType()) &&
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"Invalid type for promoted integer");
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AnalyzeNewValue(Result);
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SDValue &OpEntry = PromotedIntegers[Op];
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@ -740,6 +742,8 @@ void DAGTypeLegalizer::SetPromotedInteger(SDValue Op, SDValue Result) {
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}
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void DAGTypeLegalizer::SetSoftenedFloat(SDValue Op, SDValue Result) {
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assert(Result.getValueType() == TLI.getTypeToTransformTo(Op.getValueType()) &&
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"Invalid type for softened float");
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AnalyzeNewValue(Result);
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SDValue &OpEntry = SoftenedFloats[Op];
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@ -748,6 +752,8 @@ void DAGTypeLegalizer::SetSoftenedFloat(SDValue Op, SDValue Result) {
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}
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void DAGTypeLegalizer::SetScalarizedVector(SDValue Op, SDValue Result) {
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assert(Result.getValueType() == Op.getValueType().getVectorElementType() &&
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"Invalid type for scalarized vector");
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AnalyzeNewValue(Result);
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SDValue &OpEntry = ScalarizedVectors[Op];
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@ -767,6 +773,9 @@ void DAGTypeLegalizer::GetExpandedInteger(SDValue Op, SDValue &Lo,
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void DAGTypeLegalizer::SetExpandedInteger(SDValue Op, SDValue Lo,
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SDValue Hi) {
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assert(Lo.getValueType() == TLI.getTypeToTransformTo(Op.getValueType()) &&
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Hi.getValueType() == Lo.getValueType() &&
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"Invalid type for expanded integer");
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// Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
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AnalyzeNewValue(Lo);
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AnalyzeNewValue(Hi);
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@ -790,6 +799,9 @@ void DAGTypeLegalizer::GetExpandedFloat(SDValue Op, SDValue &Lo,
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void DAGTypeLegalizer::SetExpandedFloat(SDValue Op, SDValue Lo,
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SDValue Hi) {
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assert(Lo.getValueType() == TLI.getTypeToTransformTo(Op.getValueType()) &&
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Hi.getValueType() == Lo.getValueType() &&
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"Invalid type for expanded float");
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// Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
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AnalyzeNewValue(Lo);
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AnalyzeNewValue(Hi);
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@ -813,6 +825,12 @@ void DAGTypeLegalizer::GetSplitVector(SDValue Op, SDValue &Lo,
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void DAGTypeLegalizer::SetSplitVector(SDValue Op, SDValue Lo,
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SDValue Hi) {
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assert(Lo.getValueType().getVectorElementType() ==
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Op.getValueType().getVectorElementType() &&
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2*Lo.getValueType().getVectorNumElements() ==
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Op.getValueType().getVectorNumElements() &&
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Hi.getValueType() == Lo.getValueType() &&
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"Invalid type for split vector");
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// Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
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AnalyzeNewValue(Lo);
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AnalyzeNewValue(Hi);
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@ -825,6 +843,8 @@ void DAGTypeLegalizer::SetSplitVector(SDValue Op, SDValue Lo,
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}
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void DAGTypeLegalizer::SetWidenedVector(SDValue Op, SDValue Result) {
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assert(Result.getValueType() == TLI.getTypeToTransformTo(Op.getValueType()) &&
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"Invalid type for widened vector");
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AnalyzeNewValue(Result);
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SDValue &OpEntry = WidenedVectors[Op];
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@ -901,20 +921,13 @@ bool DAGTypeLegalizer::CustomLowerNode(SDNode *N, MVT VT, bool LegalizeResult) {
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/// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
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/// which is split into two not necessarily identical pieces.
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void DAGTypeLegalizer::GetSplitDestVTs(MVT InVT, MVT &LoVT, MVT &HiVT) {
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// Currently all types are split in half.
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if (!InVT.isVector()) {
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LoVT = HiVT = TLI.getTypeToTransformTo(InVT);
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} else {
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MVT NewEltVT = InVT.getVectorElementType();
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unsigned NumElements = InVT.getVectorNumElements();
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if ((NumElements & (NumElements-1)) == 0) { // Simple power of two vector.
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NumElements >>= 1;
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LoVT = HiVT = MVT::getVectorVT(NewEltVT, NumElements);
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} else { // Non-power-of-two vectors.
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unsigned NewNumElts_Lo = 1 << Log2_32(NumElements);
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unsigned NewNumElts_Hi = NumElements - NewNumElts_Lo;
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LoVT = MVT::getVectorVT(NewEltVT, NewNumElts_Lo);
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HiVT = MVT::getVectorVT(NewEltVT, NewNumElts_Hi);
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}
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assert(!(NumElements & 1) && "Splitting vector, but not in half!");
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LoVT = HiVT = MVT::getVectorVT(InVT.getVectorElementType(), NumElements/2);
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}
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}
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@ -64,7 +64,7 @@ private:
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SoftenFloat, // Convert this float type to a same size integer type.
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ExpandFloat, // Split this float type into two of half the size.
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ScalarizeVector, // Replace this one-element vector with its element type.
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SplitVector, // This vector type should be split into smaller vectors.
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SplitVector, // Split this vector type into two of half the size.
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WidenVector // This vector type should be widened into a larger vector.
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};
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@ -533,8 +533,8 @@ private:
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// Vector Splitting Support: LegalizeVectorTypes.cpp
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//===--------------------------------------------------------------------===//
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/// GetSplitVector - Given a processed vector Op which was split into smaller
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/// vectors, this method returns the smaller vectors. The first elements of
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/// GetSplitVector - Given a processed vector Op which was split into vectors
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/// of half the size, this method returns the halves. The first elements of
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/// Op coincide with the elements of Lo; the remaining elements of Op coincide
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/// with the elements of Hi: Op is what you would get by concatenating Lo and
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/// Hi. For example, if Op is a v8i32 that was split into two v4i32's, then
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@ -11,9 +11,11 @@
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// The routines here perform legalization when the details of the type (such as
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// whether it is an integer or a float) do not matter.
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// Expansion is the act of changing a computation in an illegal type to be a
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// computation in two identical registers of a smaller type.
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// computation in two identical registers of a smaller type. The Lo/Hi part
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// is required to be stored first in memory on little/big-endian machines.
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// Splitting is the act of changing a computation in an illegal type to be a
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// computation in two not necessarily identical registers of a smaller type.
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// There are no requirements on how the type is represented in memory.
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//
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//===----------------------------------------------------------------------===//
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@ -59,16 +61,12 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
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Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi);
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return;
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case SplitVector:
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// Convert the split parts of the input if it was split in two.
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GetSplitVector(InOp, Lo, Hi);
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if (Lo.getValueType() == Hi.getValueType()) {
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi);
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return;
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}
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break;
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi);
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return;
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case ScalarizeVector:
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// Convert the element instead.
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SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
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@ -15,8 +15,8 @@
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// eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
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// types.
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// Splitting is the act of changing a computation in an invalid vector type to
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// be a computation in multiple vectors of a smaller type. For example,
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// implementing <128 x f32> operations in terms of two <64 x f32> operations.
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// be a computation in two vectors of half the size. For example, implementing
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// <128 x f32> operations in terms of two <64 x f32> operations.
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//
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//===----------------------------------------------------------------------===//
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@ -575,7 +575,6 @@ void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
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switch (getTypeAction(InVT)) {
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default: assert(0 && "Unexpected type action!");
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case Legal: {
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assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
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MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
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@ -591,7 +590,6 @@ void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
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// If the result needs to be split and the input needs to be widened,
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// the two types must have different lengths. Use the widened result
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// and extract from it to do the split.
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assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
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SDValue InOp = GetWidenedVector(N->getOperand(0));
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MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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@ -621,9 +619,6 @@ void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
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MVT LoVT, HiVT;
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GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
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// The indices are not guaranteed to be a multiple of the new vector
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// size unless the original vector type was split in two.
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assert(LoVT == HiVT && "Non power-of-two vectors not supported!");
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Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
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Idx = DAG.getNode(ISD::ADD, dl, IdxVT, Idx,
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@ -743,29 +738,17 @@ void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
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// Split the input.
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MVT InVT = N->getOperand(0).getValueType();
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SDValue LL, LH, RL, RH;
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switch (getTypeAction(InVT)) {
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default: assert(0 && "Unexpected type action!");
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case WidenVector: assert(0 && "Unimp");
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case Legal: {
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assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
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MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
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DAG.getIntPtrConstant(0));
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LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
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DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
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MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
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DAG.getIntPtrConstant(0));
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LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
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DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
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RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
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DAG.getIntPtrConstant(0));
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RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
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DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
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break;
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}
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case SplitVector:
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GetSplitVector(N->getOperand(0), LL, LH);
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GetSplitVector(N->getOperand(1), RL, RH);
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break;
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}
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RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
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DAG.getIntPtrConstant(0));
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RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
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DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
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Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
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Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
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@ -783,7 +766,6 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
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switch (getTypeAction(InVT)) {
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default: assert(0 && "Unexpected type action!");
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case Legal: {
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assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
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MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
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@ -799,7 +781,6 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
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// If the result needs to be split and the input needs to be widened,
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// the two types must have different lengths. Use the widened result
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// and extract from it to do the split.
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assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
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SDValue InOp = GetWidenedVector(N->getOperand(0));
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MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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@ -824,8 +805,6 @@ void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
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GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
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MVT NewVT = Inputs[0].getValueType();
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unsigned NewElts = NewVT.getVectorNumElements();
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assert(NewVT == Inputs[1].getValueType() &&
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"Non power-of-two vectors not supported!");
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// If Lo or Hi uses elements from at most two of the four input vectors, then
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// express it as a vector shuffle of those two inputs. Otherwise extract the
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@ -992,8 +971,6 @@ SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
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SDValue Lo, Hi;
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DebugLoc dl = N->getDebugLoc();
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GetSplitVector(N->getOperand(0), Lo, Hi);
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assert(Lo.getValueType() == Hi.getValueType() &&
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"Returns legal non-power-of-two vector type?");
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MVT InVT = Lo.getValueType();
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MVT OutVT = MVT::getVectorVT(ResVT.getVectorElementType(),
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