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Mark FPW as allocable when frame address is taken.
llvm-svn: 91841
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parent
2d7ea292a6
commit
89d281c7c3
@ -44,15 +44,31 @@ MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
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0
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};
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static const unsigned CalleeSavedRegsFP[] = {
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MSP430::R5W, MSP430::R6W, MSP430::R7W,
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MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
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0
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};
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static const unsigned CalleeSavedRegsIntr[] = {
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MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W,
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MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
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MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W,
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0
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};
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static const unsigned CalleeSavedRegsIntrFP[] = {
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MSP430::R5W, MSP430::R6W, MSP430::R7W,
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MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
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MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W,
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0
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};
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if (hasFP(*MF))
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return (F->getCallingConv() == CallingConv::MSP430_INTR ?
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CalleeSavedRegsIntrFP : CalleeSavedRegsFP);
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else
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return (F->getCallingConv() == CallingConv::MSP430_INTR ?
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CalleeSavedRegsIntr : CalleeSavedRegs);
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return (F->getCallingConv() == CallingConv::MSP430_INTR ?
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CalleeSavedRegsIntr : CalleeSavedRegs);
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}
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const TargetRegisterClass *const *
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@ -65,6 +81,12 @@ MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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0
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};
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static const TargetRegisterClass * const CalleeSavedRegClassesFP[] = {
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, 0
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};
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static const TargetRegisterClass * const CalleeSavedRegClassesIntr[] = {
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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@ -74,9 +96,21 @@ MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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0
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};
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static const TargetRegisterClass * const CalleeSavedRegClassesIntrFP[] = {
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, &MSP430::GR16RegClass,
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&MSP430::GR16RegClass, 0
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};
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return (F->getCallingConv() == CallingConv::MSP430_INTR ?
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CalleeSavedRegClassesIntr : CalleeSavedRegClasses);
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if (hasFP(*MF))
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return (F->getCallingConv() == CallingConv::MSP430_INTR ?
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CalleeSavedRegClassesIntrFP : CalleeSavedRegClassesFP);
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else
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return (F->getCallingConv() == CallingConv::MSP430_INTR ?
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CalleeSavedRegClassesIntr : CalleeSavedRegClasses);
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}
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BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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@ -102,7 +136,11 @@ MSP430RegisterInfo::getPointerRegClass(unsigned Kind) const {
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bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
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return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return (NoFramePointerElim ||
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MF.getFrameInfo()->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken());
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}
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bool MSP430RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
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