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[AArch64] make test immune to scalarization improvements; NFC
This is explicitly implementing what the comment says rather than relying on the implicit zext of a costant operand. llvm-svn: 349166
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@ -291,15 +291,16 @@ define <2 x i64> @umull_extvec_v2i32_v2i64(<2 x i32> %arg) nounwind {
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ret <2 x i64> %tmp4
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}
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define i16 @smullWithInconsistentExtensions(<8 x i8> %vec) {
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define i16 @smullWithInconsistentExtensions(<8 x i8> %x, <8 x i8> %y) {
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; If one operand has a zero-extend and the other a sign-extend, smull
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; cannot be used.
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; CHECK-LABEL: smullWithInconsistentExtensions:
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; CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
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%1 = sext <8 x i8> %vec to <8 x i16>
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%2 = mul <8 x i16> %1, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>
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%3 = extractelement <8 x i16> %2, i32 0
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ret i16 %3
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%s = sext <8 x i8> %x to <8 x i16>
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%z = zext <8 x i8> %y to <8 x i16>
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%m = mul <8 x i16> %s, %z
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%r = extractelement <8 x i16> %m, i32 0
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ret i16 %r
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}
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define void @distribute(i16* %dst, i8* %src, i32 %mul) nounwind {
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