RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-08 12:21:04 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

handle addmode4 modifiers, fix a fixme in printRegisterList

Browse Source 
by ignoring all implicit regs when lowering.

llvm-svn: 84566
This commit is contained in:
Chris Lattner 2009-10-19 23:31:43 +00:00
parent 5630502650
commit 8a38b12ffe
2 changed files with 4 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
View File

@ -116,13 +116,10 @@ void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op) {
void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum,
const char *Modifier) {
// FIXME: ENABLE assert.
//assert((Modifier == 0 || Modifier[0] == 0) && "Cannot print modifiers");
const MCOperand &MO1 = MI->getOperand(OpNum);
const MCOperand &MO2 = MI->getOperand(OpNum+1);
ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
if (0 && Modifier && strcmp(Modifier, "submode") == 0) {
if (Modifier && strcmp(Modifier, "submode") == 0) {
if (MO1.getReg() == ARM::SP) {
// FIXME
bool isLDM = (MI->getOpcode() == ARM::LDM ||
@ -132,7 +129,7 @@ void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum,
O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
} else
O << ARM_AM::getAMSubModeStr(Mode);
} else if (0 && Modifier && strcmp(Modifier, "wide") == 0) {
} else if (Modifier && strcmp(Modifier, "wide") == 0) {
ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
if (Mode == ARM_AM::ia)
O << ".w";
@ -147,12 +144,7 @@ void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum) {
O << "{";
// Always skip the first operand, it's the optional (and implicit writeback).
for (unsigned i = OpNum+1, e = MI->getNumOperands(); i != e; ++i) {
#if 0 // FIXME: HANDLE WHEN LOWERING??
if (MI->getOperand(i).isImplicit())
continue;
#endif
if (i != OpNum+1) O << ", ";
O << getRegisterName(MI->getOperand(i).getReg());
}
O << "}";

2
lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp
View File

@ -118,6 +118,8 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MI->dump();
assert(0 && "unknown operand type");
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit()) continue;
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate: