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R600/SI: Use a multiclass for MUBUF_Load_Helper
This will simplify the instructions and also the pattern definitions. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 182288
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@ -300,17 +300,29 @@ class MTBUF_Store_Helper <bits<3> op, string asm, RegisterClass regClass> : MTBU
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let mayLoad = 0;
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}
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class MUBUF_Load_Helper <bits<7> op, string asm, RegisterClass regClass> : MUBUF <
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op,
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(outs regClass:$vdata),
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(ins i16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc, i1imm:$addr64,
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i1imm:$lds, VReg_32:$vaddr, SReg_128:$srsrc, i1imm:$slc,
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i1imm:$tfe, SSrc_32:$soffset),
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asm#" $vdata, $offset, $offen, $idxen, $glc, $addr64, "
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#"$lds, $vaddr, $srsrc, $slc, $tfe, $soffset",
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[]> {
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let mayLoad = 1;
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let mayStore = 0;
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multiclass MUBUF_Load_Helper <bits<7> op, string asm, RegisterClass regClass> {
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let glc = 0, lds = 0, slc = 0, tfe = 0, soffset = 128 /* ZERO */,
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mayLoad = 1 in {
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let offen = 1, idxen = 0, addr64 = 0, offset = 0 in {
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def _OFFEN : MUBUF <op, (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VReg_32:$vaddr),
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asm#" $vdata, $srsrc + $vaddr", []>;
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}
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let offen = 0, idxen = 1, addr64 = 0 in {
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def _IDXEN : MUBUF <op, (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VReg_32:$vaddr, i16imm:$offset),
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asm#" $vdata, $srsrc[$vaddr] + $offset", []>;
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}
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let offen = 0, idxen = 0, addr64 = 1 in {
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def _ADDR64 : MUBUF <op, (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VReg_64:$vaddr, i16imm:$offset),
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asm#" $vdata, $srsrc + $vaddr + $offset", []>;
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}
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}
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}
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class MUBUF_Store_Helper <bits<7> op, string name, RegisterClass vdataClass,
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@ -394,7 +394,7 @@ defm V_CMPX_CLASS_F64 : VOPC_64 <0x000000b8, "V_CMPX_CLASS_F64">;
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//def BUFFER_LOAD_FORMAT_X : MUBUF_ <0x00000000, "BUFFER_LOAD_FORMAT_X", []>;
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//def BUFFER_LOAD_FORMAT_XY : MUBUF_ <0x00000001, "BUFFER_LOAD_FORMAT_XY", []>;
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//def BUFFER_LOAD_FORMAT_XYZ : MUBUF_ <0x00000002, "BUFFER_LOAD_FORMAT_XYZ", []>;
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def BUFFER_LOAD_FORMAT_XYZW : MUBUF_Load_Helper <0x00000003, "BUFFER_LOAD_FORMAT_XYZW", VReg_128>;
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defm BUFFER_LOAD_FORMAT_XYZW : MUBUF_Load_Helper <0x00000003, "BUFFER_LOAD_FORMAT_XYZW", VReg_128>;
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//def BUFFER_STORE_FORMAT_X : MUBUF_ <0x00000004, "BUFFER_STORE_FORMAT_X", []>;
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//def BUFFER_STORE_FORMAT_XY : MUBUF_ <0x00000005, "BUFFER_STORE_FORMAT_XY", []>;
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//def BUFFER_STORE_FORMAT_XYZ : MUBUF_ <0x00000006, "BUFFER_STORE_FORMAT_XYZ", []>;
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@ -403,9 +403,9 @@ def BUFFER_LOAD_FORMAT_XYZW : MUBUF_Load_Helper <0x00000003, "BUFFER_LOAD_FORMAT
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//def BUFFER_LOAD_SBYTE : MUBUF_ <0x00000009, "BUFFER_LOAD_SBYTE", []>;
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//def BUFFER_LOAD_USHORT : MUBUF_ <0x0000000a, "BUFFER_LOAD_USHORT", []>;
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//def BUFFER_LOAD_SSHORT : MUBUF_ <0x0000000b, "BUFFER_LOAD_SSHORT", []>;
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def BUFFER_LOAD_DWORD : MUBUF_Load_Helper <0x0000000c, "BUFFER_LOAD_DWORD", VReg_32>;
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def BUFFER_LOAD_DWORDX2 : MUBUF_Load_Helper <0x0000000d, "BUFFER_LOAD_DWORDX2", VReg_64>;
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def BUFFER_LOAD_DWORDX4 : MUBUF_Load_Helper <0x0000000e, "BUFFER_LOAD_DWORDX4", VReg_128>;
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defm BUFFER_LOAD_DWORD : MUBUF_Load_Helper <0x0000000c, "BUFFER_LOAD_DWORD", VReg_32>;
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defm BUFFER_LOAD_DWORDX2 : MUBUF_Load_Helper <0x0000000d, "BUFFER_LOAD_DWORDX2", VReg_64>;
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defm BUFFER_LOAD_DWORDX4 : MUBUF_Load_Helper <0x0000000e, "BUFFER_LOAD_DWORDX4", VReg_128>;
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//def BUFFER_STORE_BYTE : MUBUF_ <0x00000018, "BUFFER_STORE_BYTE", []>;
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//def BUFFER_STORE_SHORT : MUBUF_ <0x0000001a, "BUFFER_STORE_SHORT", []>;
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@ -1214,10 +1214,8 @@ def : Pat <
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/* int_SI_vs_load_input */
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def : Pat<
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(int_SI_vs_load_input v16i8:$tlst, IMM12bit:$attr_offset,
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i32:$buf_idx_vgpr),
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(BUFFER_LOAD_FORMAT_XYZW imm:$attr_offset, 0, 1, 0, 0, 0,
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$buf_idx_vgpr, $tlst, 0, 0, 0)
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(int_SI_vs_load_input v16i8:$tlst, IMM12bit:$attr_offset, i32:$buf_idx_vgpr),
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(BUFFER_LOAD_FORMAT_XYZW_IDXEN $tlst, $buf_idx_vgpr, imm:$attr_offset)
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>;
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/* int_SI_export */
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@ -1542,7 +1540,7 @@ def : Pat <
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// 3. Offset in an 32Bit VGPR
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def : Pat <
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(int_SI_load_const v16i8:$sbase, i32:$voff),
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(BUFFER_LOAD_DWORD 0, 1, 0, 0, 0, 0, $voff, $sbase, 0, 0, 0)
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(BUFFER_LOAD_DWORD_OFFEN $sbase, $voff)
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>;
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// The multiplication scales from [0,1] to the unsigned integer range
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