RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-12 06:31:14 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

use continue to reduce nesting.

Browse Source 
llvm-svn: 104330
This commit is contained in:
Chris Lattner 2010-05-21 18:01:24 +00:00
parent 2077759153
commit 8c562574eb
1 changed files with 17 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
lib/Target/X86/X86FloatingPointRegKill.cpp
View File

@ -57,22 +57,25 @@ FunctionPass *llvm::createX87FPRegKillInserterPass() {
/// stack code, and thus needs an FP_REG_KILL.
static bool ContainsFPStackCode(MachineBasicBlock *MBB, unsigned SSELevel,
MachineRegisterInfo &MRI) {
// Scan the block, looking for instructions that define fp stack vregs.
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
if (I->getNumOperands() != 0 && I->getOperand(0).isReg()) {
for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
if (I->getOperand(op).isReg() && I->getOperand(op).isDef() &&
TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg())) {
const TargetRegisterClass *RegClass =
MRI.getRegClass(I->getOperand(op).getReg());
if (RegClass == X86::RFP32RegisterClass ||
RegClass == X86::RFP64RegisterClass ||
RegClass == X86::RFP80RegisterClass)
return true;
}
}
if (I->getNumOperands() == 0 || !I->getOperand(0).isReg())
continue;
for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
if (!I->getOperand(op).isReg() || !I->getOperand(op).isDef() ||
!TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()))
continue;
const TargetRegisterClass *RegClass =
MRI.getRegClass(I->getOperand(op).getReg());
switch (RegClass->getID())
case X86::RFP32RegClassID:
case X86::RFP64RegClassID:
case X86::RFP80RegClassID:
return true;
}
}