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[DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.

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llvm-svn: 239682
This commit is contained in:
Simon Pilgrim 2015-06-13 16:25:12 +00:00
parent fbf2cb2852
commit 8e1425876a
2 changed files with 77 additions and 0 deletions
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3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -4773,6 +4773,9 @@ SDValue DAGCombiner::visitBSWAP(SDNode *N) {
// fold (bswap c1) -> c2
if (isConstantIntBuildVectorOrConstantInt(N0))
return DAG.getNode(ISD::BSWAP, SDLoc(N), VT, N0);
// fold (bswap (bswap x)) -> x
if (N0.getOpcode() == ISD::BSWAP)
return N0->getOperand(0);
return SDValue();
}

74
test/CodeGen/X86/bswap-vector.ll
View File

@ -286,6 +286,80 @@ entry:
ret <4 x i16> %r
}
;
; Double BSWAP -> Identity
;
define <8 x i16> @identity_v8i16(<8 x i16> %v) {
; CHECK-ALL-LABEL: identity_v8i16:
; CHECK-ALL: # BB#0: # %entry
; CHECK-ALL: retq
entry:
%bs1 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
%bs2 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %bs1)
ret <8 x i16> %bs2
}
define <4 x i32> @identity_v4i32(<4 x i32> %v) {
; CHECK-ALL-LABEL: identity_v4i32:
; CHECK-ALL: # BB#0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
%bs2 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %bs1)
ret <4 x i32> %bs2
}
define <2 x i64> @identity_v2i64(<2 x i64> %v) {
; CHECK-ALL-LABEL: identity_v2i64:
; CHECK-ALL: # BB#0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
%bs2 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %bs1)
ret <2 x i64> %bs2
}
define <16 x i16> @identity_v16i16(<16 x i16> %v) {
; CHECK-ALL-LABEL: identity_v16i16:
; CHECK-ALL: # BB#0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
%bs2 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %bs1)
ret <16 x i16> %bs2
}
define <8 x i32> @identity_v8i32(<8 x i32> %v) {
; CHECK-ALL-LABEL: identity_v8i32:
; CHECK-ALL: # BB#0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
%bs2 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %bs1)
ret <8 x i32> %bs2
}
define <4 x i64> @identity_v4i64(<4 x i64> %v) {
; CHECK-ALL-LABEL: identity_v4i64:
; CHECK-ALL: # BB#0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
%bs2 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %bs1)
ret <4 x i64> %bs2
}
define <4 x i16> @identity_v4i16(<4 x i16> %v) {
; CHECK-ALL-LABEL: identity_v4i16:
; CHECK-ALL: # BB#0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v)
%bs2 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %bs1)
ret <4 x i16> %bs2
}
;
; Constant Folding
;