mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-12-21 02:59:15 +00:00
This is possible:
vr1 = extract_subreg vr2, 3 ... vr3 = extract_subreg vr1, 2 The end result is vr3 is equal to vr2 with subidx 2. llvm-svn: 47592
This commit is contained in:
parent
5b4101cf68
commit
8e99554e84
@ -457,8 +457,14 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
|
||||
O.setSubReg(0);
|
||||
} else {
|
||||
unsigned OldSubIdx = O.getSubReg();
|
||||
assert((!SubIdx || !OldSubIdx) && "Conflicting sub-register index!");
|
||||
if (SubIdx)
|
||||
// Sub-register indexes goes from small to large. e.g.
|
||||
// RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX
|
||||
// EAX: 0 -> AL, 1 -> AH, 2 -> AX
|
||||
// So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose
|
||||
// sub-register 2 is also AX.
|
||||
if (SubIdx && OldSubIdx && SubIdx != OldSubIdx)
|
||||
assert(OldSubIdx < SubIdx && "Conflicting sub-register index!");
|
||||
else if (SubIdx)
|
||||
O.setSubReg(SubIdx);
|
||||
O.setReg(DstReg);
|
||||
}
|
||||
|
55
test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
Normal file
55
test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
Normal file
@ -0,0 +1,55 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86-64
|
||||
|
||||
%struct.XX = type <{ i8 }>
|
||||
%struct.YY = type { i64 }
|
||||
%struct.ZZ = type opaque
|
||||
|
||||
define i8 @f(%struct.XX*** %fontMap, %struct.XX* %uen) signext {
|
||||
entry:
|
||||
%tmp45 = add i16 0, 1 ; <i16> [#uses=2]
|
||||
br i1 false, label %bb124, label %bb53
|
||||
|
||||
bb53: ; preds = %entry
|
||||
%tmp55 = call %struct.YY** @AA( i64 1, %struct.XX* %uen ) ; <%struct.YY**> [#uses=3]
|
||||
%tmp2728128 = load %struct.XX** null ; <%struct.XX*> [#uses=1]
|
||||
%tmp61 = load %struct.YY** %tmp55, align 8 ; <%struct.YY*> [#uses=1]
|
||||
%tmp62 = getelementptr %struct.YY* %tmp61, i32 0, i32 0 ; <i64*> [#uses=1]
|
||||
%tmp63 = load i64* %tmp62, align 8 ; <i64> [#uses=1]
|
||||
%tmp6566 = zext i16 %tmp45 to i64 ; <i64> [#uses=1]
|
||||
%tmp67 = shl i64 %tmp6566, 1 ; <i64> [#uses=1]
|
||||
call void @BB( %struct.YY** %tmp55, i64 %tmp67, i8 signext 0, %struct.XX* %uen )
|
||||
%tmp121131 = icmp eq i16 %tmp45, 1 ; <i1> [#uses=1]
|
||||
br i1 %tmp121131, label %bb124, label %bb70.preheader
|
||||
|
||||
bb70.preheader: ; preds = %bb53
|
||||
%tmp72 = bitcast %struct.XX* %tmp2728128 to %struct.ZZ*** ; <%struct.ZZ***> [#uses=1]
|
||||
br label %bb70
|
||||
|
||||
bb70: ; preds = %bb119, %bb70.preheader
|
||||
%indvar133 = phi i32 [ %indvar.next134, %bb119 ], [ 0, %bb70.preheader ] ; <i32> [#uses=2]
|
||||
%tmp.135 = trunc i64 %tmp63 to i32 ; <i32> [#uses=1]
|
||||
%tmp136 = shl i32 %indvar133, 1 ; <i32> [#uses=1]
|
||||
%DD = add i32 %tmp136, %tmp.135 ; <i32> [#uses=1]
|
||||
%tmp73 = load %struct.ZZ*** %tmp72, align 8 ; <%struct.ZZ**> [#uses=0]
|
||||
br i1 false, label %bb119, label %bb77
|
||||
|
||||
bb77: ; preds = %bb70
|
||||
%tmp8384 = trunc i32 %DD to i16 ; <i16> [#uses=1]
|
||||
%tmp85 = sub i16 0, %tmp8384 ; <i16> [#uses=1]
|
||||
store i16 %tmp85, i16* null, align 8
|
||||
call void @CC( %struct.YY** %tmp55, i64 0, i64 2, i8* null, %struct.XX* %uen )
|
||||
ret i8 0
|
||||
|
||||
bb119: ; preds = %bb70
|
||||
%indvar.next134 = add i32 %indvar133, 1 ; <i32> [#uses=1]
|
||||
br label %bb70
|
||||
|
||||
bb124: ; preds = %bb53, %entry
|
||||
ret i8 undef
|
||||
}
|
||||
|
||||
declare %struct.YY** @AA(i64, %struct.XX*)
|
||||
|
||||
declare void @BB(%struct.YY**, i64, i8 signext , %struct.XX*)
|
||||
|
||||
declare void @CC(%struct.YY**, i64, i64, i8*, %struct.XX*)
|
Loading…
Reference in New Issue
Block a user