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1. In ppc64 mode we need only use one GPR.
2. Float values need to be promoted to double when they are vararg. llvm-svn: 32074
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@ -1377,6 +1377,12 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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break;
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case MVT::f32:
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case MVT::f64:
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if (isVarArg && isPPC64) {
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// Float varargs need to be promoted to double.
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if (Arg.getValueType() == MVT::f32)
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Arg = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Arg);
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}
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if (FPR_idx != NumFPRs) {
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RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg));
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@ -1390,7 +1396,7 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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MemOpChains.push_back(Load.getValue(1));
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RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
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}
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if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64) {
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if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64 && !isPPC64){
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SDOperand ConstFour = DAG.getConstant(4, PtrOff.getValueType());
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PtrOff = DAG.getNode(ISD::ADD, PtrVT, PtrOff, ConstFour);
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SDOperand Load = DAG.getLoad(PtrVT, Store, PtrOff, NULL, 0);
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