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[AArch64] Add integer abs testcases for D51873.
llvm-svn: 342156
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52
test/CodeGen/AArch64/iabs.ll
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52
test/CodeGen/AArch64/iabs.ll
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; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
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define i8 @test_i8(i8 %a) nounwind {
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; CHECK-LABEL: test_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sbfx w8, w0, #7, #1
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; CHECK-NEXT: add w9, w0, w8
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; CHECK-NEXT: eor w0, w9, w8
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; CHECK-NEXT: ret
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%tmp1neg = sub i8 0, %a
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%b = icmp sgt i8 %a, -1
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%abs = select i1 %b, i8 %a, i8 %tmp1neg
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ret i8 %abs
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}
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define i16 @test_i16(i16 %a) nounwind {
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; CHECK-LABEL: test_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sbfx w8, w0, #15, #1
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; CHECK-NEXT: add w9, w0, w8
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; CHECK-NEXT: eor w0, w9, w8
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; CHECK-NEXT: ret
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%tmp1neg = sub i16 0, %a
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%b = icmp sgt i16 %a, -1
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%abs = select i1 %b, i16 %a, i16 %tmp1neg
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ret i16 %abs
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}
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define i32 @test_i32(i32 %a) nounwind {
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; CHECK-LABEL: test_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: cneg w0, w0, mi
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; CHECK-NEXT: ret
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%tmp1neg = sub i32 0, %a
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%b = icmp sgt i32 %a, -1
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%abs = select i1 %b, i32 %a, i32 %tmp1neg
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ret i32 %abs
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}
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define i64 @test_i64(i64 %a) nounwind {
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; CHECK-LABEL: test_i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: cneg x0, x0, mi
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; CHECK-NEXT: ret
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%tmp1neg = sub i64 0, %a
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%b = icmp sgt i64 %a, -1
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%abs = select i1 %b, i64 %a, i64 %tmp1neg
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ret i64 %abs
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}
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