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MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid same

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prefix byte problem as in r104062.
 - As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction.

llvm-svn: 104120
This commit is contained in:
Daniel Dunbar 2010-05-19 15:26:43 +00:00
parent 12e2ce6164
commit 9646c49298
2 changed files with 17 additions and 0 deletions
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10
lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
View File

@ -379,6 +379,16 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
break;
}
// TAILJMPd, TAILJMPd64 - Lower to the correct jump instructions.
case X86::TAILJMPd:
case X86::TAILJMPd64: {
MCOperand Saved = OutMI.getOperand(0);
OutMI = MCInst();
OutMI.setOpcode(X86::TAILJMP_1);
OutMI.addOperand(Saved);
break;
}
// The assembler backend wants to see branches in their small form and relax
// them to their large form. The JIT can only handle the large form because
// it does not do relaxation. For now, translate the large form to the

7
lib/Target/X86/X86InstrInfo.td
View File

@ -712,6 +712,13 @@ let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
let mayLoad = 1 in
def TAILJMPm : I<0xFF, MRM4m, (outs), (ins i32mem_TC:$dst, variable_ops),
"jmp{l}\t{*}$dst # TAILCALL", []>;
// FIXME: This is a hack so that MCInst lowering can preserve the TAILCALL
// marker on instructions, while still being able to relax.
let isCodeGenOnly = 1 in {
def TAILJMP_1 : Ii8PCRel<0xEB, RawFrm, (outs), (ins brtarget8:$dst),
"jmp\t$dst # TAILCALL", []>;
}
}
//===----------------------------------------------------------------------===//