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Provide correct registers for EH stuff on ARM
llvm-svn: 124151
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@ -551,9 +551,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
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setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
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// FIXME: Shouldn't need this, since no register is used, but the legalizer
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// doesn't yet know how to not do that for SjLj.
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setExceptionSelectorRegister(ARM::R0);
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setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
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setExceptionPointerRegister(ARM::R0);
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setExceptionSelectorRegister(ARM::R1);
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setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
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// ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use
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// the default expansion.
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