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[NewPM] Port MachineModuleInfo to the new pass manager.
Existing clients are converted to use MachineModuleInfoWrapperPass. The new interface is for defining a new pass manager API in CodeGen. Reviewers: fedor.sergeev, philip.pfaffe, chandlerc, arsenm Reviewed By: arsenm, fedor.sergeev Differential Revision: https://reviews.llvm.org/D64183 llvm-svn: 373240
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@ -33,6 +33,7 @@
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/PointerIntPair.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Pass.h"
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@ -74,7 +75,10 @@ protected:
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/// made by different debugging and exception handling schemes and reformated
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/// for specific use.
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///
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class MachineModuleInfo : public ImmutablePass {
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class MachineModuleInfo {
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friend class MachineModuleInfoWrapperPass;
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friend class MachineModuleAnalysis;
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const LLVMTargetMachine &TM;
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/// This is the MCContext used for the entire code generator.
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@ -141,14 +145,15 @@ class MachineModuleInfo : public ImmutablePass {
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MachineFunction *LastResult = nullptr; ///< Used for shortcut/cache.
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public:
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static char ID; // Pass identification, replacement for typeid
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explicit MachineModuleInfo(const LLVMTargetMachine *TM = nullptr);
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~MachineModuleInfo() override;
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// Initialization and Finalization
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bool doInitialization(Module &) override;
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bool doFinalization(Module &) override;
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MachineModuleInfo(MachineModuleInfo &&MMII);
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MachineModuleInfo &operator=(MachineModuleInfo &&MMII) = default;
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~MachineModuleInfo();
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void initialize();
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void finalize();
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const LLVMTargetMachine &getTarget() const { return TM; }
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@ -254,6 +259,39 @@ public:
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/// \}
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}; // End class MachineModuleInfo
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class MachineModuleInfoWrapperPass : public ImmutablePass {
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MachineModuleInfo MMI;
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public:
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static char ID; // Pass identification, replacement for typeid
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explicit MachineModuleInfoWrapperPass(const LLVMTargetMachine *TM = nullptr);
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explicit MachineModuleInfoWrapperPass(const MachineModuleInfo &MMI);
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// Initialization and Finalization
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bool doInitialization(Module &) override;
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bool doFinalization(Module &) override;
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MachineModuleInfo &getMMI() { return MMI; }
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const MachineModuleInfo &getMMI() const { return MMI; }
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};
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/// An analysis that produces \c MachineInfo for a module.
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class MachineModuleAnalysis : public AnalysisInfoMixin<MachineModuleAnalysis> {
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friend AnalysisInfoMixin<MachineModuleAnalysis>;
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static AnalysisKey Key;
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const LLVMTargetMachine *TM;
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public:
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/// Provide the result type for this analysis pass.
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using Result = MachineModuleInfo;
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MachineModuleAnalysis(const LLVMTargetMachine *TM) : TM(TM) {}
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/// Run the analysis pass and produce machine module information.
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MachineModuleInfo run(Module &M, ModuleAnalysisManager &);
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};
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} // end namespace llvm
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#endif // LLVM_CODEGEN_MACHINEMODULEINFO_H
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@ -266,7 +266,7 @@ void initializeMachineDominatorTreePass(PassRegistry&);
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void initializeMachineFunctionPrinterPassPass(PassRegistry&);
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void initializeMachineLICMPass(PassRegistry&);
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void initializeMachineLoopInfoPass(PassRegistry&);
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void initializeMachineModuleInfoPass(PassRegistry&);
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void initializeMachineModuleInfoWrapperPassPass(PassRegistry &);
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void initializeMachineOptimizationRemarkEmitterPassPass(PassRegistry&);
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void initializeMachineOutlinerPass(PassRegistry&);
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void initializeMachinePipelinerPass(PassRegistry&);
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@ -25,7 +25,7 @@ namespace llvm {
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class Function;
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class GlobalValue;
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class MachineModuleInfo;
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class MachineModuleInfoWrapperPass;
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class Mangler;
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class MCAsmInfo;
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class MCContext;
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@ -284,12 +284,13 @@ public:
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/// emitted. Typically this will involve several steps of code generation.
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/// This method should return true if emission of this file type is not
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/// supported, or false on success.
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/// \p MMI is an optional parameter that, if set to non-nullptr,
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/// \p MMIWP is an optional parameter that, if set to non-nullptr,
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/// will be used to set the MachineModuloInfo for this PM.
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virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
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raw_pwrite_stream *, CodeGenFileType,
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bool /*DisableVerify*/ = true,
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MachineModuleInfo *MMI = nullptr) {
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virtual bool
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addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
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raw_pwrite_stream *, CodeGenFileType,
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bool /*DisableVerify*/ = true,
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MachineModuleInfoWrapperPass *MMIWP = nullptr) {
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return true;
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}
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@ -341,12 +342,13 @@ public:
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/// Add passes to the specified pass manager to get the specified file
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/// emitted. Typically this will involve several steps of code generation.
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/// \p MMI is an optional parameter that, if set to non-nullptr,
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/// will be used to set the MachineModuloInfofor this PM.
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bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
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raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
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bool DisableVerify = true,
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MachineModuleInfo *MMI = nullptr) override;
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/// \p MMIWP is an optional parameter that, if set to non-nullptr,
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/// will be used to set the MachineModuloInfo for this PM.
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bool
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addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
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raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
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bool DisableVerify = true,
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MachineModuleInfoWrapperPass *MMIWP = nullptr) override;
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/// Add passes to the specified pass manager to get machine code emitted with
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/// the MCJIT. This method returns true if machine code is not supported. It
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@ -365,7 +367,7 @@ public:
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/// Adds an AsmPrinter pass to the pipeline that prints assembly or
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/// machine code from the MI representation.
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bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
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raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
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raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
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MCContext &Context);
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/// True if the target uses physical regs at Prolog/Epilog insertion
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@ -250,13 +250,14 @@ const MCSection *AsmPrinter::getCurrentSection() const {
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void AsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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AU.addRequired<MachineModuleInfo>();
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AU.addRequired<MachineModuleInfoWrapperPass>();
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AU.addRequired<MachineOptimizationRemarkEmitterPass>();
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AU.addRequired<GCModuleInfo>();
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}
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bool AsmPrinter::doInitialization(Module &M) {
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MMI = getAnalysisIfAvailable<MachineModuleInfo>();
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auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
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MMI = MMIWP ? &MMIWP->getMMI() : nullptr;
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// Initialize TargetLoweringObjectFile.
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const_cast<TargetLoweringObjectFile&>(getObjFileLowering())
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@ -129,9 +129,10 @@ bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
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getAnalysis<MachineBlockFrequencyInfo>());
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BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
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getAnalysis<MachineBranchProbabilityInfo>());
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return Folder.OptimizeFunction(MF, MF.getSubtarget().getInstrInfo(),
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MF.getSubtarget().getRegisterInfo(),
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getAnalysisIfAvailable<MachineModuleInfo>());
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auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
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return Folder.OptimizeFunction(
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MF, MF.getSubtarget().getInstrInfo(), MF.getSubtarget().getRegisterInfo(),
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MMIWP ? &MMIWP->getMMI() : nullptr);
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}
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BranchFolder::BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,
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@ -65,7 +65,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeMachineFunctionPrinterPassPass(Registry);
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initializeMachineLICMPass(Registry);
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initializeMachineLoopInfoPass(Registry);
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initializeMachineModuleInfoPass(Registry);
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initializeMachineModuleInfoWrapperPassPass(Registry);
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initializeMachineOptimizationRemarkEmitterPassPass(Registry);
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initializeMachineOutlinerPass(Registry);
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initializeMachinePipelinerPass(Registry);
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@ -249,7 +249,7 @@ GCMachineCodeAnalysis::GCMachineCodeAnalysis() : MachineFunctionPass(ID) {}
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void GCMachineCodeAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
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MachineFunctionPass::getAnalysisUsage(AU);
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AU.setPreservesAll();
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AU.addRequired<MachineModuleInfo>();
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AU.addRequired<MachineModuleInfoWrapperPass>();
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AU.addRequired<GCModuleInfo>();
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}
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@ -310,7 +310,7 @@ bool GCMachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
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return false;
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FI = &getAnalysis<GCModuleInfo>().getFunctionInfo(MF.getFunction());
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MMI = &getAnalysis<MachineModuleInfo>();
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MMI = &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
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TII = MF.getSubtarget().getInstrInfo();
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// Find the size of the stack frame. There may be no correct static frame
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@ -356,8 +356,10 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
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if (!PreRegAlloc) {
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// Tail merge tend to expose more if-conversion opportunities.
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BranchFolder BF(true, false, MBFI, *MBPI);
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BFChange = BF.OptimizeFunction(MF, TII, ST.getRegisterInfo(),
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getAnalysisIfAvailable<MachineModuleInfo>());
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auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
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BFChange = BF.OptimizeFunction(
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MF, TII, ST.getRegisterInfo(),
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MMIWP ? &MMIWP->getMMI() : nullptr);
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}
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LLVM_DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
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@ -496,8 +498,10 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
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if (MadeChange && IfCvtBranchFold) {
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BranchFolder BF(false, false, MBFI, *MBPI);
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BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
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getAnalysisIfAvailable<MachineModuleInfo>());
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auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
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BF.OptimizeFunction(
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MF, TII, MF.getSubtarget().getRegisterInfo(),
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MMIWP ? &MMIWP->getMMI() : nullptr);
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}
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MadeChange |= BFChange;
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@ -96,14 +96,15 @@ LLVMTargetMachine::getTargetTransformInfo(const Function &F) {
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/// addPassesToX helper drives creation and initialization of TargetPassConfig.
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static TargetPassConfig *
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addPassesToGenerateCode(LLVMTargetMachine &TM, PassManagerBase &PM,
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bool DisableVerify, MachineModuleInfo &MMI) {
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bool DisableVerify,
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MachineModuleInfoWrapperPass &MMIWP) {
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// Targets may override createPassConfig to provide a target-specific
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// subclass.
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TargetPassConfig *PassConfig = TM.createPassConfig(PM);
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// Set PassConfig options provided by TargetMachine.
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PassConfig->setDisableVerify(DisableVerify);
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PM.add(PassConfig);
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PM.add(&MMI);
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PM.add(&MMIWP);
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if (PassConfig->addISelPasses())
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return nullptr;
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@ -186,17 +187,15 @@ bool LLVMTargetMachine::addAsmPrinter(PassManagerBase &PM,
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return false;
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}
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bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
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raw_pwrite_stream &Out,
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raw_pwrite_stream *DwoOut,
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CodeGenFileType FileType,
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bool DisableVerify,
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MachineModuleInfo *MMI) {
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bool LLVMTargetMachine::addPassesToEmitFile(
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PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
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CodeGenFileType FileType, bool DisableVerify,
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MachineModuleInfoWrapperPass *MMIWP) {
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// Add common CodeGen passes.
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if (!MMI)
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MMI = new MachineModuleInfo(this);
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if (!MMIWP)
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MMIWP = new MachineModuleInfoWrapperPass(this);
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TargetPassConfig *PassConfig =
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addPassesToGenerateCode(*this, PM, DisableVerify, *MMI);
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addPassesToGenerateCode(*this, PM, DisableVerify, *MMIWP);
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if (!PassConfig)
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return true;
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@ -206,12 +205,13 @@ bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
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// testing to be meaningful, we need to ensure that the symbols created
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// are MCSymbolXCOFF variants, which requires that
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// the TargetLoweringObjectFile instance has been initialized.
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MCContext &Ctx = MMI->getContext();
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MCContext &Ctx = MMIWP->getMMI().getContext();
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const_cast<TargetLoweringObjectFile &>(*this->getObjFileLowering())
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.Initialize(Ctx, *this);
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}
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PM.add(createPrintMIRPass(Out));
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} else if (addAsmPrinter(PM, Out, DwoOut, FileType, MMI->getContext()))
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} else if (addAsmPrinter(PM, Out, DwoOut, FileType,
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MMIWP->getMMI().getContext()))
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return true;
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PM.add(createFreeMachineFunctionPass());
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@ -227,15 +227,15 @@ bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
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raw_pwrite_stream &Out,
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bool DisableVerify) {
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// Add common CodeGen passes.
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MachineModuleInfo *MMI = new MachineModuleInfo(this);
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MachineModuleInfoWrapperPass *MMIWP = new MachineModuleInfoWrapperPass(this);
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TargetPassConfig *PassConfig =
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addPassesToGenerateCode(*this, PM, DisableVerify, *MMI);
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addPassesToGenerateCode(*this, PM, DisableVerify, *MMIWP);
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if (!PassConfig)
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return true;
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assert(TargetPassConfig::willCompleteCodeGenPipeline() &&
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"Cannot emit MC with limited codegen pipeline");
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Ctx = &MMI->getContext();
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Ctx = &MMIWP->getMMI().getContext();
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if (Options.MCOptions.MCSaveTempLabels)
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Ctx->setAllowTemporaryLabels(false);
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@ -3082,8 +3082,9 @@ bool MachineBlockPlacement::runOnMachineFunction(MachineFunction &MF) {
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BranchFolder BF(/*EnableTailMerge=*/true, /*CommonHoist=*/false, *MBFI,
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*MBPI, TailMergeSize);
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auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
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if (BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
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getAnalysisIfAvailable<MachineModuleInfo>(), MLI,
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MMIWP ? &MMIWP->getMMI() : nullptr, MLI,
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/*AfterPlacement=*/true)) {
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// Redo the layout if tail merging creates/removes/moves blocks.
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BlockToChain.clear();
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@ -41,7 +41,7 @@ bool MachineFunctionPass::runOnFunction(Function &F) {
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if (F.hasAvailableExternallyLinkage())
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return false;
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MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
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MachineModuleInfo &MMI = getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
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MachineFunction &MF = MMI.getOrCreateMachineFunction(F);
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MachineFunctionProperties &MFProps = MF.getProperties();
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@ -101,8 +101,8 @@ bool MachineFunctionPass::runOnFunction(Function &F) {
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}
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void MachineFunctionPass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<MachineModuleInfo>();
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AU.addPreserved<MachineModuleInfo>();
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AU.addRequired<MachineModuleInfoWrapperPass>();
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AU.addPreserved<MachineModuleInfoWrapperPass>();
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// MachineFunctionPass preserves all LLVM IR passes, but there's no
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// high-level way to express this. Instead, just list a bunch of
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@ -36,11 +36,6 @@
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using namespace llvm;
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using namespace llvm::dwarf;
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// Handle the Pass registration stuff necessary to use DataLayout's.
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INITIALIZE_PASS(MachineModuleInfo, "machinemoduleinfo",
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"Machine Module Information", false, false)
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char MachineModuleInfo::ID = 0;
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// Out of line virtual method.
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MachineModuleInfoImpl::~MachineModuleInfoImpl() = default;
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@ -193,27 +188,15 @@ void MMIAddrLabelMapCallbackPtr::allUsesReplacedWith(Value *V2) {
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Map->UpdateForRAUWBlock(cast<BasicBlock>(getValPtr()), cast<BasicBlock>(V2));
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}
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MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM)
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: ImmutablePass(ID), TM(*TM),
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Context(TM->getMCAsmInfo(), TM->getMCRegisterInfo(),
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TM->getObjFileLowering(), nullptr, nullptr, false) {
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initializeMachineModuleInfoPass(*PassRegistry::getPassRegistry());
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}
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MachineModuleInfo::~MachineModuleInfo() = default;
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bool MachineModuleInfo::doInitialization(Module &M) {
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void MachineModuleInfo::initialize() {
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ObjFileMMI = nullptr;
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CurCallSite = 0;
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UsesMSVCFloatingPoint = UsesMorestackAddr = false;
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HasSplitStack = HasNosplitStack = false;
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AddrLabelSymbols = nullptr;
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TheModule = &M;
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DbgInfoAvailable = !llvm::empty(M.debug_compile_units());
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return false;
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}
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bool MachineModuleInfo::doFinalization(Module &M) {
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void MachineModuleInfo::finalize() {
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Personalities.clear();
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delete AddrLabelSymbols;
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@ -223,10 +206,30 @@ bool MachineModuleInfo::doFinalization(Module &M) {
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delete ObjFileMMI;
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ObjFileMMI = nullptr;
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return false;
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}
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MachineModuleInfo::MachineModuleInfo(MachineModuleInfo &&MMI)
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: TM(std::move(MMI.TM)),
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Context(MMI.TM.getMCAsmInfo(), MMI.TM.getMCRegisterInfo(),
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MMI.TM.getObjFileLowering(), nullptr, nullptr, false) {
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ObjFileMMI = MMI.ObjFileMMI;
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CurCallSite = MMI.CurCallSite;
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UsesMSVCFloatingPoint = MMI.UsesMSVCFloatingPoint;
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UsesMorestackAddr = MMI.UsesMorestackAddr;
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HasSplitStack = MMI.HasSplitStack;
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HasNosplitStack = MMI.HasNosplitStack;
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AddrLabelSymbols = MMI.AddrLabelSymbols;
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TheModule = MMI.TheModule;
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}
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MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM)
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: TM(*TM), Context(TM->getMCAsmInfo(), TM->getMCRegisterInfo(),
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TM->getObjFileLowering(), nullptr, nullptr, false) {
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initialize();
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}
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MachineModuleInfo::~MachineModuleInfo() { finalize(); }
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//===- Address of Block Management ----------------------------------------===//
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ArrayRef<MCSymbol *>
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@ -305,12 +308,13 @@ public:
|
||||
FreeMachineFunction() : FunctionPass(ID) {}
|
||||
|
||||
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
||||
AU.addRequired<MachineModuleInfo>();
|
||||
AU.addPreserved<MachineModuleInfo>();
|
||||
AU.addRequired<MachineModuleInfoWrapperPass>();
|
||||
AU.addPreserved<MachineModuleInfoWrapperPass>();
|
||||
}
|
||||
|
||||
bool runOnFunction(Function &F) override {
|
||||
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
|
||||
MachineModuleInfo &MMI =
|
||||
getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
|
||||
MMI.deleteMachineFunctionFor(F);
|
||||
return true;
|
||||
}
|
||||
@ -327,3 +331,36 @@ char FreeMachineFunction::ID;
|
||||
FunctionPass *llvm::createFreeMachineFunctionPass() {
|
||||
return new FreeMachineFunction();
|
||||
}
|
||||
|
||||
MachineModuleInfoWrapperPass::MachineModuleInfoWrapperPass(
|
||||
const LLVMTargetMachine *TM)
|
||||
: ImmutablePass(ID), MMI(TM) {
|
||||
initializeMachineModuleInfoWrapperPassPass(*PassRegistry::getPassRegistry());
|
||||
}
|
||||
|
||||
// Handle the Pass registration stuff necessary to use DataLayout's.
|
||||
INITIALIZE_PASS(MachineModuleInfoWrapperPass, "machinemoduleinfo",
|
||||
"Machine Module Information", false, false)
|
||||
char MachineModuleInfoWrapperPass::ID = 0;
|
||||
|
||||
bool MachineModuleInfoWrapperPass::doInitialization(Module &M) {
|
||||
MMI.initialize();
|
||||
MMI.TheModule = &M;
|
||||
MMI.DbgInfoAvailable = !empty(M.debug_compile_units());
|
||||
return false;
|
||||
}
|
||||
|
||||
bool MachineModuleInfoWrapperPass::doFinalization(Module &M) {
|
||||
MMI.finalize();
|
||||
return false;
|
||||
}
|
||||
|
||||
AnalysisKey MachineModuleAnalysis::Key;
|
||||
|
||||
MachineModuleInfo MachineModuleAnalysis::run(Module &M,
|
||||
ModuleAnalysisManager &) {
|
||||
MachineModuleInfo MMI(TM);
|
||||
MMI.TheModule = &M;
|
||||
MMI.DbgInfoAvailable = !empty(M.debug_compile_units());
|
||||
return MMI;
|
||||
}
|
||||
|
@ -846,8 +846,8 @@ struct MachineOutliner : public ModulePass {
|
||||
StringRef getPassName() const override { return "Machine Outliner"; }
|
||||
|
||||
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
||||
AU.addRequired<MachineModuleInfo>();
|
||||
AU.addPreserved<MachineModuleInfo>();
|
||||
AU.addRequired<MachineModuleInfoWrapperPass>();
|
||||
AU.addPreserved<MachineModuleInfoWrapperPass>();
|
||||
AU.setPreservesAll();
|
||||
ModulePass::getAnalysisUsage(AU);
|
||||
}
|
||||
@ -1128,7 +1128,7 @@ MachineOutliner::createOutlinedFunction(Module &M, OutlinedFunction &OF,
|
||||
IRBuilder<> Builder(EntryBB);
|
||||
Builder.CreateRetVoid();
|
||||
|
||||
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
|
||||
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
|
||||
MachineFunction &MF = MMI.getOrCreateMachineFunction(*F);
|
||||
MachineBasicBlock &MBB = *MF.CreateMachineBasicBlock();
|
||||
const TargetSubtargetInfo &STI = MF.getSubtarget();
|
||||
@ -1421,7 +1421,7 @@ bool MachineOutliner::runOnModule(Module &M) {
|
||||
if (M.empty())
|
||||
return false;
|
||||
|
||||
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
|
||||
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
|
||||
|
||||
// If the user passed -enable-machine-outliner=always or
|
||||
// -enable-machine-outliner, the pass will run on all functions in the module.
|
||||
|
@ -103,7 +103,8 @@ bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) {
|
||||
df_iterator_default_set<MachineBasicBlock*> Reachable;
|
||||
bool ModifiedPHI = false;
|
||||
|
||||
MMI = getAnalysisIfAvailable<MachineModuleInfo>();
|
||||
auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
|
||||
MMI = MMIWP ? &MMIWP->getMMI() : nullptr;
|
||||
MachineDominatorTree *MDT = getAnalysisIfAvailable<MachineDominatorTree>();
|
||||
MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
|
||||
|
||||
|
@ -53,6 +53,7 @@
|
||||
#include "llvm/Analysis/TargetLibraryInfo.h"
|
||||
#include "llvm/Analysis/TargetTransformInfo.h"
|
||||
#include "llvm/Analysis/TypeBasedAliasAnalysis.h"
|
||||
#include "llvm/CodeGen/MachineModuleInfo.h"
|
||||
#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
|
||||
#include "llvm/CodeGen/UnreachableBlockElim.h"
|
||||
#include "llvm/IR/Dominators.h"
|
||||
|
@ -173,7 +173,7 @@ bool X86InsertPrefetch::doInitialization(Module &M) {
|
||||
|
||||
void X86InsertPrefetch::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
AU.setPreservesAll();
|
||||
AU.addRequired<MachineModuleInfo>();
|
||||
AU.addRequired<MachineModuleInfoWrapperPass>();
|
||||
}
|
||||
|
||||
bool X86InsertPrefetch::runOnMachineFunction(MachineFunction &MF) {
|
||||
|
@ -58,8 +58,8 @@ public:
|
||||
|
||||
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
||||
MachineFunctionPass::getAnalysisUsage(AU);
|
||||
AU.addRequired<MachineModuleInfo>();
|
||||
AU.addPreserved<MachineModuleInfo>();
|
||||
AU.addRequired<MachineModuleInfoWrapperPass>();
|
||||
AU.addPreserved<MachineModuleInfoWrapperPass>();
|
||||
}
|
||||
|
||||
private:
|
||||
@ -97,7 +97,7 @@ bool X86RetpolineThunks::runOnMachineFunction(MachineFunction &MF) {
|
||||
TII = STI->getInstrInfo();
|
||||
Is64Bit = TM->getTargetTriple().getArch() == Triple::x86_64;
|
||||
|
||||
MMI = &getAnalysis<MachineModuleInfo>();
|
||||
MMI = &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
|
||||
Module &M = const_cast<Module &>(*MMI->getModule());
|
||||
|
||||
// If this function is not a thunk, check to see if we need to insert
|
||||
|
@ -538,8 +538,9 @@ static int compileModule(char **argv, LLVMContext &Context) {
|
||||
}
|
||||
|
||||
const char *argv0 = argv[0];
|
||||
LLVMTargetMachine &LLVMTM = static_cast<LLVMTargetMachine&>(*Target);
|
||||
MachineModuleInfo *MMI = new MachineModuleInfo(&LLVMTM);
|
||||
LLVMTargetMachine &LLVMTM = static_cast<LLVMTargetMachine &>(*Target);
|
||||
MachineModuleInfoWrapperPass *MMIWP =
|
||||
new MachineModuleInfoWrapperPass(&LLVMTM);
|
||||
|
||||
// Construct a custom pass pipeline that starts after instruction
|
||||
// selection.
|
||||
@ -559,7 +560,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
|
||||
|
||||
TPC.setDisableVerify(NoVerify);
|
||||
PM.add(&TPC);
|
||||
PM.add(MMI);
|
||||
PM.add(MMIWP);
|
||||
TPC.printAndVerify("");
|
||||
for (const std::string &RunPassName : *RunPassNames) {
|
||||
if (addPass(PM, argv0, RunPassName, TPC))
|
||||
@ -570,7 +571,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
|
||||
PM.add(createFreeMachineFunctionPass());
|
||||
} else if (Target->addPassesToEmitFile(PM, *OS,
|
||||
DwoOut ? &DwoOut->os() : nullptr,
|
||||
FileType, NoVerify, MMI)) {
|
||||
FileType, NoVerify, MMIWP)) {
|
||||
WithColor::warning(errs(), argv[0])
|
||||
<< "target does not support generation of this"
|
||||
<< " file type!\n";
|
||||
@ -578,8 +579,8 @@ static int compileModule(char **argv, LLVMContext &Context) {
|
||||
}
|
||||
|
||||
if (MIR) {
|
||||
assert(MMI && "Forgot to create MMI?");
|
||||
if (MIR->parseMachineFunctions(*M, *MMI))
|
||||
assert(MMIWP && "Forgot to create MMIWP?");
|
||||
if (MIR->parseMachineFunctions(*M, MMIWP->getMMI()))
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
@ -163,11 +163,11 @@ llvm::BitVector getFunctionReservedRegs(const llvm::TargetMachine &TM) {
|
||||
std::unique_ptr<llvm::Module> Module =
|
||||
createModule(Context, TM.createDataLayout());
|
||||
// TODO: This only works for targets implementing LLVMTargetMachine.
|
||||
const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine&>(TM);
|
||||
std::unique_ptr<llvm::MachineModuleInfo> MMI =
|
||||
std::make_unique<llvm::MachineModuleInfo>(&LLVMTM);
|
||||
llvm::MachineFunction &MF =
|
||||
createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get());
|
||||
const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine &>(TM);
|
||||
std::unique_ptr<llvm::MachineModuleInfoWrapperPass> MMIWP =
|
||||
std::make_unique<llvm::MachineModuleInfoWrapperPass>(&LLVMTM);
|
||||
llvm::MachineFunction &MF = createVoidVoidPtrMachineFunction(
|
||||
FunctionID, Module.get(), &MMIWP.get()->getMMI());
|
||||
// Saving reserved registers for client.
|
||||
return MF.getSubtarget().getRegisterInfo()->getReservedRegs(MF);
|
||||
}
|
||||
@ -182,10 +182,10 @@ void assembleToStream(const ExegesisTarget &ET,
|
||||
std::make_unique<llvm::LLVMContext>();
|
||||
std::unique_ptr<llvm::Module> Module =
|
||||
createModule(Context, TM->createDataLayout());
|
||||
std::unique_ptr<llvm::MachineModuleInfo> MMI =
|
||||
std::make_unique<llvm::MachineModuleInfo>(TM.get());
|
||||
llvm::MachineFunction &MF =
|
||||
createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get());
|
||||
std::unique_ptr<llvm::MachineModuleInfoWrapperPass> MMIWP =
|
||||
std::make_unique<llvm::MachineModuleInfoWrapperPass>(TM.get());
|
||||
llvm::MachineFunction &MF = createVoidVoidPtrMachineFunction(
|
||||
FunctionID, Module.get(), &MMIWP.get()->getMMI());
|
||||
|
||||
// We need to instruct the passes that we're done with SSA and virtual
|
||||
// registers.
|
||||
@ -221,7 +221,7 @@ void assembleToStream(const ExegesisTarget &ET,
|
||||
MF.getRegInfo().freezeReservedRegs(MF);
|
||||
|
||||
// We create the pass manager, run the passes to populate AsmBuffer.
|
||||
llvm::MCContext &MCContext = MMI->getContext();
|
||||
llvm::MCContext &MCContext = MMIWP->getMMI().getContext();
|
||||
llvm::legacy::PassManager PM;
|
||||
|
||||
llvm::TargetLibraryInfoImpl TLII(llvm::Triple(Module->getTargetTriple()));
|
||||
@ -229,7 +229,7 @@ void assembleToStream(const ExegesisTarget &ET,
|
||||
|
||||
llvm::TargetPassConfig *TPC = TM->createPassConfig(PM);
|
||||
PM.add(TPC);
|
||||
PM.add(MMI.release());
|
||||
PM.add(MMIWP.release());
|
||||
TPC->printAndVerify("MachineFunctionGenerator::assemble");
|
||||
// Add target-specific passes.
|
||||
ET.addTargetSpecificPasses(PM);
|
||||
|
@ -63,10 +63,10 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
|
||||
|
||||
M->setDataLayout(TM.createDataLayout());
|
||||
|
||||
MachineModuleInfo *MMI = new MachineModuleInfo(&TM);
|
||||
if (MIR->parseMachineFunctions(*M, *MMI))
|
||||
MachineModuleInfoWrapperPass *MMIWP = new MachineModuleInfoWrapperPass(&TM);
|
||||
if (MIR->parseMachineFunctions(*M, MMIWP->getMMI()))
|
||||
return nullptr;
|
||||
PM.add(MMI);
|
||||
PM.add(MMIWP);
|
||||
|
||||
return M;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user