[NewPM] Port MachineModuleInfo to the new pass manager.

Existing clients are converted to use MachineModuleInfoWrapperPass. The
new interface is for defining a new pass manager API in CodeGen.

Reviewers: fedor.sergeev, philip.pfaffe, chandlerc, arsenm

Reviewed By: arsenm, fedor.sergeev

Differential Revision: https://reviews.llvm.org/D64183

llvm-svn: 373240
This commit is contained in:
Yuanfang Chen 2019-09-30 17:54:50 +00:00
parent 62f731223b
commit 9795ad43cf
20 changed files with 193 additions and 106 deletions

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@ -33,6 +33,7 @@
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/IR/PassManager.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Pass.h"
@ -74,7 +75,10 @@ protected:
/// made by different debugging and exception handling schemes and reformated
/// for specific use.
///
class MachineModuleInfo : public ImmutablePass {
class MachineModuleInfo {
friend class MachineModuleInfoWrapperPass;
friend class MachineModuleAnalysis;
const LLVMTargetMachine &TM;
/// This is the MCContext used for the entire code generator.
@ -141,14 +145,15 @@ class MachineModuleInfo : public ImmutablePass {
MachineFunction *LastResult = nullptr; ///< Used for shortcut/cache.
public:
static char ID; // Pass identification, replacement for typeid
explicit MachineModuleInfo(const LLVMTargetMachine *TM = nullptr);
~MachineModuleInfo() override;
// Initialization and Finalization
bool doInitialization(Module &) override;
bool doFinalization(Module &) override;
MachineModuleInfo(MachineModuleInfo &&MMII);
MachineModuleInfo &operator=(MachineModuleInfo &&MMII) = default;
~MachineModuleInfo();
void initialize();
void finalize();
const LLVMTargetMachine &getTarget() const { return TM; }
@ -254,6 +259,39 @@ public:
/// \}
}; // End class MachineModuleInfo
class MachineModuleInfoWrapperPass : public ImmutablePass {
MachineModuleInfo MMI;
public:
static char ID; // Pass identification, replacement for typeid
explicit MachineModuleInfoWrapperPass(const LLVMTargetMachine *TM = nullptr);
explicit MachineModuleInfoWrapperPass(const MachineModuleInfo &MMI);
// Initialization and Finalization
bool doInitialization(Module &) override;
bool doFinalization(Module &) override;
MachineModuleInfo &getMMI() { return MMI; }
const MachineModuleInfo &getMMI() const { return MMI; }
};
/// An analysis that produces \c MachineInfo for a module.
class MachineModuleAnalysis : public AnalysisInfoMixin<MachineModuleAnalysis> {
friend AnalysisInfoMixin<MachineModuleAnalysis>;
static AnalysisKey Key;
const LLVMTargetMachine *TM;
public:
/// Provide the result type for this analysis pass.
using Result = MachineModuleInfo;
MachineModuleAnalysis(const LLVMTargetMachine *TM) : TM(TM) {}
/// Run the analysis pass and produce machine module information.
MachineModuleInfo run(Module &M, ModuleAnalysisManager &);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEMODULEINFO_H

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@ -266,7 +266,7 @@ void initializeMachineDominatorTreePass(PassRegistry&);
void initializeMachineFunctionPrinterPassPass(PassRegistry&);
void initializeMachineLICMPass(PassRegistry&);
void initializeMachineLoopInfoPass(PassRegistry&);
void initializeMachineModuleInfoPass(PassRegistry&);
void initializeMachineModuleInfoWrapperPassPass(PassRegistry &);
void initializeMachineOptimizationRemarkEmitterPassPass(PassRegistry&);
void initializeMachineOutlinerPass(PassRegistry&);
void initializeMachinePipelinerPass(PassRegistry&);

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@ -25,7 +25,7 @@ namespace llvm {
class Function;
class GlobalValue;
class MachineModuleInfo;
class MachineModuleInfoWrapperPass;
class Mangler;
class MCAsmInfo;
class MCContext;
@ -284,12 +284,13 @@ public:
/// emitted. Typically this will involve several steps of code generation.
/// This method should return true if emission of this file type is not
/// supported, or false on success.
/// \p MMI is an optional parameter that, if set to non-nullptr,
/// \p MMIWP is an optional parameter that, if set to non-nullptr,
/// will be used to set the MachineModuloInfo for this PM.
virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
raw_pwrite_stream *, CodeGenFileType,
bool /*DisableVerify*/ = true,
MachineModuleInfo *MMI = nullptr) {
virtual bool
addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
raw_pwrite_stream *, CodeGenFileType,
bool /*DisableVerify*/ = true,
MachineModuleInfoWrapperPass *MMIWP = nullptr) {
return true;
}
@ -341,12 +342,13 @@ public:
/// Add passes to the specified pass manager to get the specified file
/// emitted. Typically this will involve several steps of code generation.
/// \p MMI is an optional parameter that, if set to non-nullptr,
/// will be used to set the MachineModuloInfofor this PM.
bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
bool DisableVerify = true,
MachineModuleInfo *MMI = nullptr) override;
/// \p MMIWP is an optional parameter that, if set to non-nullptr,
/// will be used to set the MachineModuloInfo for this PM.
bool
addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
bool DisableVerify = true,
MachineModuleInfoWrapperPass *MMIWP = nullptr) override;
/// Add passes to the specified pass manager to get machine code emitted with
/// the MCJIT. This method returns true if machine code is not supported. It
@ -365,7 +367,7 @@ public:
/// Adds an AsmPrinter pass to the pipeline that prints assembly or
/// machine code from the MI representation.
bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
MCContext &Context);
/// True if the target uses physical regs at Prolog/Epilog insertion

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@ -250,13 +250,14 @@ const MCSection *AsmPrinter::getCurrentSection() const {
void AsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
AU.addRequired<MachineModuleInfo>();
AU.addRequired<MachineModuleInfoWrapperPass>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
AU.addRequired<GCModuleInfo>();
}
bool AsmPrinter::doInitialization(Module &M) {
MMI = getAnalysisIfAvailable<MachineModuleInfo>();
auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
MMI = MMIWP ? &MMIWP->getMMI() : nullptr;
// Initialize TargetLoweringObjectFile.
const_cast<TargetLoweringObjectFile&>(getObjFileLowering())

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@ -129,9 +129,10 @@ bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
getAnalysis<MachineBlockFrequencyInfo>());
BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
getAnalysis<MachineBranchProbabilityInfo>());
return Folder.OptimizeFunction(MF, MF.getSubtarget().getInstrInfo(),
MF.getSubtarget().getRegisterInfo(),
getAnalysisIfAvailable<MachineModuleInfo>());
auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
return Folder.OptimizeFunction(
MF, MF.getSubtarget().getInstrInfo(), MF.getSubtarget().getRegisterInfo(),
MMIWP ? &MMIWP->getMMI() : nullptr);
}
BranchFolder::BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,

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@ -65,7 +65,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeMachineFunctionPrinterPassPass(Registry);
initializeMachineLICMPass(Registry);
initializeMachineLoopInfoPass(Registry);
initializeMachineModuleInfoPass(Registry);
initializeMachineModuleInfoWrapperPassPass(Registry);
initializeMachineOptimizationRemarkEmitterPassPass(Registry);
initializeMachineOutlinerPass(Registry);
initializeMachinePipelinerPass(Registry);

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@ -249,7 +249,7 @@ GCMachineCodeAnalysis::GCMachineCodeAnalysis() : MachineFunctionPass(ID) {}
void GCMachineCodeAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
AU.setPreservesAll();
AU.addRequired<MachineModuleInfo>();
AU.addRequired<MachineModuleInfoWrapperPass>();
AU.addRequired<GCModuleInfo>();
}
@ -310,7 +310,7 @@ bool GCMachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
return false;
FI = &getAnalysis<GCModuleInfo>().getFunctionInfo(MF.getFunction());
MMI = &getAnalysis<MachineModuleInfo>();
MMI = &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
TII = MF.getSubtarget().getInstrInfo();
// Find the size of the stack frame. There may be no correct static frame

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@ -356,8 +356,10 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
if (!PreRegAlloc) {
// Tail merge tend to expose more if-conversion opportunities.
BranchFolder BF(true, false, MBFI, *MBPI);
BFChange = BF.OptimizeFunction(MF, TII, ST.getRegisterInfo(),
getAnalysisIfAvailable<MachineModuleInfo>());
auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
BFChange = BF.OptimizeFunction(
MF, TII, ST.getRegisterInfo(),
MMIWP ? &MMIWP->getMMI() : nullptr);
}
LLVM_DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
@ -496,8 +498,10 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
if (MadeChange && IfCvtBranchFold) {
BranchFolder BF(false, false, MBFI, *MBPI);
BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
getAnalysisIfAvailable<MachineModuleInfo>());
auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
BF.OptimizeFunction(
MF, TII, MF.getSubtarget().getRegisterInfo(),
MMIWP ? &MMIWP->getMMI() : nullptr);
}
MadeChange |= BFChange;

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@ -96,14 +96,15 @@ LLVMTargetMachine::getTargetTransformInfo(const Function &F) {
/// addPassesToX helper drives creation and initialization of TargetPassConfig.
static TargetPassConfig *
addPassesToGenerateCode(LLVMTargetMachine &TM, PassManagerBase &PM,
bool DisableVerify, MachineModuleInfo &MMI) {
bool DisableVerify,
MachineModuleInfoWrapperPass &MMIWP) {
// Targets may override createPassConfig to provide a target-specific
// subclass.
TargetPassConfig *PassConfig = TM.createPassConfig(PM);
// Set PassConfig options provided by TargetMachine.
PassConfig->setDisableVerify(DisableVerify);
PM.add(PassConfig);
PM.add(&MMI);
PM.add(&MMIWP);
if (PassConfig->addISelPasses())
return nullptr;
@ -186,17 +187,15 @@ bool LLVMTargetMachine::addAsmPrinter(PassManagerBase &PM,
return false;
}
bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
raw_pwrite_stream &Out,
raw_pwrite_stream *DwoOut,
CodeGenFileType FileType,
bool DisableVerify,
MachineModuleInfo *MMI) {
bool LLVMTargetMachine::addPassesToEmitFile(
PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
CodeGenFileType FileType, bool DisableVerify,
MachineModuleInfoWrapperPass *MMIWP) {
// Add common CodeGen passes.
if (!MMI)
MMI = new MachineModuleInfo(this);
if (!MMIWP)
MMIWP = new MachineModuleInfoWrapperPass(this);
TargetPassConfig *PassConfig =
addPassesToGenerateCode(*this, PM, DisableVerify, *MMI);
addPassesToGenerateCode(*this, PM, DisableVerify, *MMIWP);
if (!PassConfig)
return true;
@ -206,12 +205,13 @@ bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
// testing to be meaningful, we need to ensure that the symbols created
// are MCSymbolXCOFF variants, which requires that
// the TargetLoweringObjectFile instance has been initialized.
MCContext &Ctx = MMI->getContext();
MCContext &Ctx = MMIWP->getMMI().getContext();
const_cast<TargetLoweringObjectFile &>(*this->getObjFileLowering())
.Initialize(Ctx, *this);
}
PM.add(createPrintMIRPass(Out));
} else if (addAsmPrinter(PM, Out, DwoOut, FileType, MMI->getContext()))
} else if (addAsmPrinter(PM, Out, DwoOut, FileType,
MMIWP->getMMI().getContext()))
return true;
PM.add(createFreeMachineFunctionPass());
@ -227,15 +227,15 @@ bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
raw_pwrite_stream &Out,
bool DisableVerify) {
// Add common CodeGen passes.
MachineModuleInfo *MMI = new MachineModuleInfo(this);
MachineModuleInfoWrapperPass *MMIWP = new MachineModuleInfoWrapperPass(this);
TargetPassConfig *PassConfig =
addPassesToGenerateCode(*this, PM, DisableVerify, *MMI);
addPassesToGenerateCode(*this, PM, DisableVerify, *MMIWP);
if (!PassConfig)
return true;
assert(TargetPassConfig::willCompleteCodeGenPipeline() &&
"Cannot emit MC with limited codegen pipeline");
Ctx = &MMI->getContext();
Ctx = &MMIWP->getMMI().getContext();
if (Options.MCOptions.MCSaveTempLabels)
Ctx->setAllowTemporaryLabels(false);

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@ -3082,8 +3082,9 @@ bool MachineBlockPlacement::runOnMachineFunction(MachineFunction &MF) {
BranchFolder BF(/*EnableTailMerge=*/true, /*CommonHoist=*/false, *MBFI,
*MBPI, TailMergeSize);
auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
if (BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
getAnalysisIfAvailable<MachineModuleInfo>(), MLI,
MMIWP ? &MMIWP->getMMI() : nullptr, MLI,
/*AfterPlacement=*/true)) {
// Redo the layout if tail merging creates/removes/moves blocks.
BlockToChain.clear();

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@ -41,7 +41,7 @@ bool MachineFunctionPass::runOnFunction(Function &F) {
if (F.hasAvailableExternallyLinkage())
return false;
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
MachineFunction &MF = MMI.getOrCreateMachineFunction(F);
MachineFunctionProperties &MFProps = MF.getProperties();
@ -101,8 +101,8 @@ bool MachineFunctionPass::runOnFunction(Function &F) {
}
void MachineFunctionPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineModuleInfo>();
AU.addPreserved<MachineModuleInfo>();
AU.addRequired<MachineModuleInfoWrapperPass>();
AU.addPreserved<MachineModuleInfoWrapperPass>();
// MachineFunctionPass preserves all LLVM IR passes, but there's no
// high-level way to express this. Instead, just list a bunch of

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@ -36,11 +36,6 @@
using namespace llvm;
using namespace llvm::dwarf;
// Handle the Pass registration stuff necessary to use DataLayout's.
INITIALIZE_PASS(MachineModuleInfo, "machinemoduleinfo",
"Machine Module Information", false, false)
char MachineModuleInfo::ID = 0;
// Out of line virtual method.
MachineModuleInfoImpl::~MachineModuleInfoImpl() = default;
@ -193,27 +188,15 @@ void MMIAddrLabelMapCallbackPtr::allUsesReplacedWith(Value *V2) {
Map->UpdateForRAUWBlock(cast<BasicBlock>(getValPtr()), cast<BasicBlock>(V2));
}
MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM)
: ImmutablePass(ID), TM(*TM),
Context(TM->getMCAsmInfo(), TM->getMCRegisterInfo(),
TM->getObjFileLowering(), nullptr, nullptr, false) {
initializeMachineModuleInfoPass(*PassRegistry::getPassRegistry());
}
MachineModuleInfo::~MachineModuleInfo() = default;
bool MachineModuleInfo::doInitialization(Module &M) {
void MachineModuleInfo::initialize() {
ObjFileMMI = nullptr;
CurCallSite = 0;
UsesMSVCFloatingPoint = UsesMorestackAddr = false;
HasSplitStack = HasNosplitStack = false;
AddrLabelSymbols = nullptr;
TheModule = &M;
DbgInfoAvailable = !llvm::empty(M.debug_compile_units());
return false;
}
bool MachineModuleInfo::doFinalization(Module &M) {
void MachineModuleInfo::finalize() {
Personalities.clear();
delete AddrLabelSymbols;
@ -223,10 +206,30 @@ bool MachineModuleInfo::doFinalization(Module &M) {
delete ObjFileMMI;
ObjFileMMI = nullptr;
return false;
}
MachineModuleInfo::MachineModuleInfo(MachineModuleInfo &&MMI)
: TM(std::move(MMI.TM)),
Context(MMI.TM.getMCAsmInfo(), MMI.TM.getMCRegisterInfo(),
MMI.TM.getObjFileLowering(), nullptr, nullptr, false) {
ObjFileMMI = MMI.ObjFileMMI;
CurCallSite = MMI.CurCallSite;
UsesMSVCFloatingPoint = MMI.UsesMSVCFloatingPoint;
UsesMorestackAddr = MMI.UsesMorestackAddr;
HasSplitStack = MMI.HasSplitStack;
HasNosplitStack = MMI.HasNosplitStack;
AddrLabelSymbols = MMI.AddrLabelSymbols;
TheModule = MMI.TheModule;
}
MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM)
: TM(*TM), Context(TM->getMCAsmInfo(), TM->getMCRegisterInfo(),
TM->getObjFileLowering(), nullptr, nullptr, false) {
initialize();
}
MachineModuleInfo::~MachineModuleInfo() { finalize(); }
//===- Address of Block Management ----------------------------------------===//
ArrayRef<MCSymbol *>
@ -305,12 +308,13 @@ public:
FreeMachineFunction() : FunctionPass(ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineModuleInfo>();
AU.addPreserved<MachineModuleInfo>();
AU.addRequired<MachineModuleInfoWrapperPass>();
AU.addPreserved<MachineModuleInfoWrapperPass>();
}
bool runOnFunction(Function &F) override {
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
MachineModuleInfo &MMI =
getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
MMI.deleteMachineFunctionFor(F);
return true;
}
@ -327,3 +331,36 @@ char FreeMachineFunction::ID;
FunctionPass *llvm::createFreeMachineFunctionPass() {
return new FreeMachineFunction();
}
MachineModuleInfoWrapperPass::MachineModuleInfoWrapperPass(
const LLVMTargetMachine *TM)
: ImmutablePass(ID), MMI(TM) {
initializeMachineModuleInfoWrapperPassPass(*PassRegistry::getPassRegistry());
}
// Handle the Pass registration stuff necessary to use DataLayout's.
INITIALIZE_PASS(MachineModuleInfoWrapperPass, "machinemoduleinfo",
"Machine Module Information", false, false)
char MachineModuleInfoWrapperPass::ID = 0;
bool MachineModuleInfoWrapperPass::doInitialization(Module &M) {
MMI.initialize();
MMI.TheModule = &M;
MMI.DbgInfoAvailable = !empty(M.debug_compile_units());
return false;
}
bool MachineModuleInfoWrapperPass::doFinalization(Module &M) {
MMI.finalize();
return false;
}
AnalysisKey MachineModuleAnalysis::Key;
MachineModuleInfo MachineModuleAnalysis::run(Module &M,
ModuleAnalysisManager &) {
MachineModuleInfo MMI(TM);
MMI.TheModule = &M;
MMI.DbgInfoAvailable = !empty(M.debug_compile_units());
return MMI;
}

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@ -846,8 +846,8 @@ struct MachineOutliner : public ModulePass {
StringRef getPassName() const override { return "Machine Outliner"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineModuleInfo>();
AU.addPreserved<MachineModuleInfo>();
AU.addRequired<MachineModuleInfoWrapperPass>();
AU.addPreserved<MachineModuleInfoWrapperPass>();
AU.setPreservesAll();
ModulePass::getAnalysisUsage(AU);
}
@ -1128,7 +1128,7 @@ MachineOutliner::createOutlinedFunction(Module &M, OutlinedFunction &OF,
IRBuilder<> Builder(EntryBB);
Builder.CreateRetVoid();
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
MachineFunction &MF = MMI.getOrCreateMachineFunction(*F);
MachineBasicBlock &MBB = *MF.CreateMachineBasicBlock();
const TargetSubtargetInfo &STI = MF.getSubtarget();
@ -1421,7 +1421,7 @@ bool MachineOutliner::runOnModule(Module &M) {
if (M.empty())
return false;
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfo>();
MachineModuleInfo &MMI = getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
// If the user passed -enable-machine-outliner=always or
// -enable-machine-outliner, the pass will run on all functions in the module.

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@ -103,7 +103,8 @@ bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) {
df_iterator_default_set<MachineBasicBlock*> Reachable;
bool ModifiedPHI = false;
MMI = getAnalysisIfAvailable<MachineModuleInfo>();
auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
MMI = MMIWP ? &MMIWP->getMMI() : nullptr;
MachineDominatorTree *MDT = getAnalysisIfAvailable<MachineDominatorTree>();
MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();

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@ -53,6 +53,7 @@
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/TypeBasedAliasAnalysis.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
#include "llvm/CodeGen/UnreachableBlockElim.h"
#include "llvm/IR/Dominators.h"

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@ -173,7 +173,7 @@ bool X86InsertPrefetch::doInitialization(Module &M) {
void X86InsertPrefetch::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequired<MachineModuleInfo>();
AU.addRequired<MachineModuleInfoWrapperPass>();
}
bool X86InsertPrefetch::runOnMachineFunction(MachineFunction &MF) {

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@ -58,8 +58,8 @@ public:
void getAnalysisUsage(AnalysisUsage &AU) const override {
MachineFunctionPass::getAnalysisUsage(AU);
AU.addRequired<MachineModuleInfo>();
AU.addPreserved<MachineModuleInfo>();
AU.addRequired<MachineModuleInfoWrapperPass>();
AU.addPreserved<MachineModuleInfoWrapperPass>();
}
private:
@ -97,7 +97,7 @@ bool X86RetpolineThunks::runOnMachineFunction(MachineFunction &MF) {
TII = STI->getInstrInfo();
Is64Bit = TM->getTargetTriple().getArch() == Triple::x86_64;
MMI = &getAnalysis<MachineModuleInfo>();
MMI = &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
Module &M = const_cast<Module &>(*MMI->getModule());
// If this function is not a thunk, check to see if we need to insert

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@ -538,8 +538,9 @@ static int compileModule(char **argv, LLVMContext &Context) {
}
const char *argv0 = argv[0];
LLVMTargetMachine &LLVMTM = static_cast<LLVMTargetMachine&>(*Target);
MachineModuleInfo *MMI = new MachineModuleInfo(&LLVMTM);
LLVMTargetMachine &LLVMTM = static_cast<LLVMTargetMachine &>(*Target);
MachineModuleInfoWrapperPass *MMIWP =
new MachineModuleInfoWrapperPass(&LLVMTM);
// Construct a custom pass pipeline that starts after instruction
// selection.
@ -559,7 +560,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
TPC.setDisableVerify(NoVerify);
PM.add(&TPC);
PM.add(MMI);
PM.add(MMIWP);
TPC.printAndVerify("");
for (const std::string &RunPassName : *RunPassNames) {
if (addPass(PM, argv0, RunPassName, TPC))
@ -570,7 +571,7 @@ static int compileModule(char **argv, LLVMContext &Context) {
PM.add(createFreeMachineFunctionPass());
} else if (Target->addPassesToEmitFile(PM, *OS,
DwoOut ? &DwoOut->os() : nullptr,
FileType, NoVerify, MMI)) {
FileType, NoVerify, MMIWP)) {
WithColor::warning(errs(), argv[0])
<< "target does not support generation of this"
<< " file type!\n";
@ -578,8 +579,8 @@ static int compileModule(char **argv, LLVMContext &Context) {
}
if (MIR) {
assert(MMI && "Forgot to create MMI?");
if (MIR->parseMachineFunctions(*M, *MMI))
assert(MMIWP && "Forgot to create MMIWP?");
if (MIR->parseMachineFunctions(*M, MMIWP->getMMI()))
return 1;
}

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@ -163,11 +163,11 @@ llvm::BitVector getFunctionReservedRegs(const llvm::TargetMachine &TM) {
std::unique_ptr<llvm::Module> Module =
createModule(Context, TM.createDataLayout());
// TODO: This only works for targets implementing LLVMTargetMachine.
const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine&>(TM);
std::unique_ptr<llvm::MachineModuleInfo> MMI =
std::make_unique<llvm::MachineModuleInfo>(&LLVMTM);
llvm::MachineFunction &MF =
createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get());
const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine &>(TM);
std::unique_ptr<llvm::MachineModuleInfoWrapperPass> MMIWP =
std::make_unique<llvm::MachineModuleInfoWrapperPass>(&LLVMTM);
llvm::MachineFunction &MF = createVoidVoidPtrMachineFunction(
FunctionID, Module.get(), &MMIWP.get()->getMMI());
// Saving reserved registers for client.
return MF.getSubtarget().getRegisterInfo()->getReservedRegs(MF);
}
@ -182,10 +182,10 @@ void assembleToStream(const ExegesisTarget &ET,
std::make_unique<llvm::LLVMContext>();
std::unique_ptr<llvm::Module> Module =
createModule(Context, TM->createDataLayout());
std::unique_ptr<llvm::MachineModuleInfo> MMI =
std::make_unique<llvm::MachineModuleInfo>(TM.get());
llvm::MachineFunction &MF =
createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get());
std::unique_ptr<llvm::MachineModuleInfoWrapperPass> MMIWP =
std::make_unique<llvm::MachineModuleInfoWrapperPass>(TM.get());
llvm::MachineFunction &MF = createVoidVoidPtrMachineFunction(
FunctionID, Module.get(), &MMIWP.get()->getMMI());
// We need to instruct the passes that we're done with SSA and virtual
// registers.
@ -221,7 +221,7 @@ void assembleToStream(const ExegesisTarget &ET,
MF.getRegInfo().freezeReservedRegs(MF);
// We create the pass manager, run the passes to populate AsmBuffer.
llvm::MCContext &MCContext = MMI->getContext();
llvm::MCContext &MCContext = MMIWP->getMMI().getContext();
llvm::legacy::PassManager PM;
llvm::TargetLibraryInfoImpl TLII(llvm::Triple(Module->getTargetTriple()));
@ -229,7 +229,7 @@ void assembleToStream(const ExegesisTarget &ET,
llvm::TargetPassConfig *TPC = TM->createPassConfig(PM);
PM.add(TPC);
PM.add(MMI.release());
PM.add(MMIWP.release());
TPC->printAndVerify("MachineFunctionGenerator::assemble");
// Add target-specific passes.
ET.addTargetSpecificPasses(PM);

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@ -63,10 +63,10 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
M->setDataLayout(TM.createDataLayout());
MachineModuleInfo *MMI = new MachineModuleInfo(&TM);
if (MIR->parseMachineFunctions(*M, *MMI))
MachineModuleInfoWrapperPass *MMIWP = new MachineModuleInfoWrapperPass(&TM);
if (MIR->parseMachineFunctions(*M, MMIWP->getMMI()))
return nullptr;
PM.add(MMI);
PM.add(MMIWP);
return M;
}