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[MC] Change MCCFIInstruction::createDefCfa to cfiDefCfa which does not negate Offset
The negative Offset has caused a bunch of problems and confused quite a few call sites. Delete the unneeded negation and fix all call sites.
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@ -482,9 +482,9 @@ private:
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public:
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/// .cfi_def_cfa defines a rule for computing CFA as: take address from
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/// Register and add Offset to it.
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static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register,
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int Offset) {
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return MCCFIInstruction(OpDefCfa, L, Register, -Offset, "");
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static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register,
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int Offset) {
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return MCCFIInstruction(OpDefCfa, L, Register, Offset, "");
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}
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/// .cfi_def_cfa_register modifies a rule for computing CFA. From now
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@ -124,7 +124,7 @@ class CFIInstrInserter : public MachineFunctionPass {
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/// if needed. The negated value is needed when creating CFI instructions that
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/// set absolute offset.
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int getCorrectCFAOffset(MachineBasicBlock *MBB) {
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return -MBBVector[MBB->getNumber()].IncomingCFAOffset;
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return MBBVector[MBB->getNumber()].IncomingCFAOffset;
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}
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void reportCFAError(const MBBCFAInfo &Pred, const MBBCFAInfo &Succ);
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@ -314,7 +314,7 @@ bool CFIInstrInserter::insertCFIInstrs(MachineFunction &MF) {
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// incoming offset and register of this block, add a def_cfa instruction
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// with the correct offset and register for this block.
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if (PrevMBBInfo->OutgoingCFARegister != MBBInfo.IncomingCFARegister) {
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
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nullptr, MBBInfo.IncomingCFARegister, getCorrectCFAOffset(&MBB)));
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BuildMI(*MBBInfo.MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex);
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@ -324,7 +324,7 @@ bool CFIInstrInserter::insertCFIInstrs(MachineFunction &MF) {
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} else {
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unsigned CFIIndex =
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MF.addFrameInst(MCCFIInstruction::createDefCfaOffset(
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nullptr, getCorrectCFAOffset(&MBB)));
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nullptr, -getCorrectCFAOffset(&MBB)));
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BuildMI(*MBBInfo.MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex);
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}
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@ -2256,9 +2256,8 @@ bool MIParser::parseCFIOperand(MachineOperand &Dest) {
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if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
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parseCFIOffset(Offset))
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return true;
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// NB: MCCFIInstruction::createDefCfa negates the offset.
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CFIIndex =
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MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
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MF.addFrameInst(MCCFIInstruction::cfiDefCfa(nullptr, Reg, Offset));
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break;
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case MIToken::kw_cfi_remember_state:
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CFIIndex = MF.addFrameInst(MCCFIInstruction::createRememberState(nullptr));
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@ -461,7 +461,7 @@ MCSymbol *MCStreamer::emitCFILabel() {
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void MCStreamer::emitCFIDefCfa(int64_t Register, int64_t Offset) {
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MCSymbol *Label = emitCFILabel();
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MCCFIInstruction Instruction =
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MCCFIInstruction::createDefCfa(Label, Register, Offset);
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MCCFIInstruction::cfiDefCfa(Label, Register, -Offset);
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MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
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if (!CurFrame)
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return;
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@ -1349,8 +1349,8 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
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if (HasFP) {
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// Define the current CFA rule to use the provided FP.
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unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true);
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
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nullptr, Reg, StackGrowth - FixedObject));
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unsigned CFIIndex = MF.addFrameInst(
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MCCFIInstruction::cfiDefCfa(nullptr, Reg, FixedObject - StackGrowth));
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BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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@ -254,7 +254,7 @@ static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
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// Initial state of the frame pointer is SP.
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unsigned Reg = MRI.getDwarfRegNum(AArch64::SP, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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@ -57,7 +57,7 @@ static MCAsmInfo *createARCMCAsmInfo(const MCRegisterInfo &MRI,
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MCAsmInfo *MAI = new ARCMCAsmInfo(TT);
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// Initial state of the frame pointer is SP.
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, ARC::SP, 0);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, ARC::SP, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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@ -593,9 +593,9 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
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PushSize + FramePtrOffsetInPush,
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MachineInstr::FrameSetup);
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if (FramePtrOffsetInPush + PushSize != 0) {
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
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nullptr, MRI->getDwarfRegNum(FramePtr, true),
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-(FPCXTSaveSize + ArgRegsSaveSize - FramePtrOffsetInPush)));
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FPCXTSaveSize + ArgRegsSaveSize - FramePtrOffsetInPush));
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BuildMI(MBB, AfterPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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@ -200,7 +200,7 @@ static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI,
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MAI = new ARMELFMCAsmInfo(TheTriple);
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unsigned Reg = MRI.getDwarfRegNum(ARM::SP, true);
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MAI->addInitialFrameState(MCCFIInstruction::createDefCfa(nullptr, Reg, 0));
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MAI->addInitialFrameState(MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0));
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return MAI;
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}
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@ -308,8 +308,8 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF,
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.add(predOps(ARMCC::AL));
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if(FramePtrOffsetInBlock) {
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CFAOffset += FramePtrOffsetInBlock;
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
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nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
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nullptr, MRI->getDwarfRegNum(FramePtr, true), -CFAOffset));
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BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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@ -1056,9 +1056,9 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB,
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// | +-- Old SP (before allocframe)
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// +-- New FP (after allocframe)
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//
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// MCCFIInstruction::createDefCfa subtracts the offset from the register.
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// MCCFIInstruction::cfiDefCfa adds the offset from the register.
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// MCCFIInstruction::createOffset takes the offset without sign change.
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auto DefCfa = MCCFIInstruction::createDefCfa(FrameLabel, DwFPReg, -8);
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auto DefCfa = MCCFIInstruction::cfiDefCfa(FrameLabel, DwFPReg, 8);
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BuildMI(MBB, At, DL, CFID)
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.addCFIIndex(MF.addFrameInst(DefCfa));
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// R31 (return addr) = CFA - 4
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@ -290,9 +290,8 @@ static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI,
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MCAsmInfo *MAI = new HexagonMCAsmInfo(TT);
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// VirtualFP = (R30 + #0).
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MCCFIInstruction Inst =
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MCCFIInstruction::createDefCfa(nullptr,
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MRI.getDwarfRegNum(Hexagon::R30, true), 0);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
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nullptr, MRI.getDwarfRegNum(Hexagon::R30, true), 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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@ -95,7 +95,7 @@ static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI,
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// Initial state of the frame pointer is R1.
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unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
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MCCFIInstruction Inst =
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MCCFIInstruction::createDefCfa(nullptr, MRI.getDwarfRegNum(Reg, true), 0);
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MCCFIInstruction::cfiDefCfa(nullptr, MRI.getDwarfRegNum(Reg, true), 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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@ -57,7 +57,7 @@ static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI,
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MCAsmInfo *MAI = new RISCVMCAsmInfo(TT);
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Register SP = MRI.getDwarfRegNum(RISCV::X2, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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@ -329,9 +329,9 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
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RealStackSize - RVFI->getVarArgsSaveSize(),
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MachineInstr::FrameSetup);
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// Emit ".cfi_def_cfa $fp, -RVFI->getVarArgsSaveSize()"
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
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nullptr, RI->getDwarfRegNum(FPReg, true), -RVFI->getVarArgsSaveSize()));
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// Emit ".cfi_def_cfa $fp, RVFI->getVarArgsSaveSize()"
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unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
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nullptr, RI->getDwarfRegNum(FPReg, true), RVFI->getVarArgsSaveSize()));
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BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex);
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}
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@ -37,7 +37,7 @@ static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
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unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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@ -47,7 +47,7 @@ static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
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unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, -2047);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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@ -150,10 +150,9 @@ static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
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const Triple &TT,
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const MCTargetOptions &Options) {
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MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
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MCCFIInstruction Inst =
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MCCFIInstruction::createDefCfa(nullptr,
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MRI.getDwarfRegNum(SystemZ::R15D, true),
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SystemZMC::CFAOffsetFromInitialSP);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
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nullptr, MRI.getDwarfRegNum(SystemZ::R15D, true),
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-SystemZMC::CFAOffsetFromInitialSP);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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@ -36,7 +36,7 @@ static MCAsmInfo *createVEMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT,
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const MCTargetOptions &Options) {
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MCAsmInfo *MAI = new VEELFMCAsmInfo(TT);
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unsigned Reg = MRI.getDwarfRegNum(VE::SX11, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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@ -349,8 +349,8 @@ static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI,
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// Initial state of the frame pointer is esp+stackGrowth.
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unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP;
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(
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nullptr, MRI.getDwarfRegNum(StackPtr, true), -stackGrowth);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
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nullptr, MRI.getDwarfRegNum(StackPtr, true), stackGrowth);
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MAI->addInitialFrameState(Inst);
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// Add return address to move list
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@ -1842,8 +1842,8 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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if (NeedsDwarfCFI) {
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unsigned DwarfStackPtr =
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TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);
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BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfa(
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nullptr, DwarfStackPtr, -SlotSize));
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BuildCFI(MBB, MBBI, DL,
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MCCFIInstruction::cfiDefCfa(nullptr, DwarfStackPtr, SlotSize));
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if (!MBB.succ_empty() && !MBB.isReturnBlock()) {
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unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
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BuildCFI(MBB, AfterPop, DL,
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@ -60,7 +60,7 @@ static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI,
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MCAsmInfo *MAI = new XCoreMCAsmInfo(TT);
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// Initial state of the frame pointer is SP.
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, XCore::SP, 0);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, XCore::SP, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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