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Rename variables to avoid confusion. No functionallity change intended.
llvm-svn: 144377
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feb72bfc08
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@ -563,9 +563,9 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
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// Use MVN to emit negative constants.
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if (VT == MVT::i32 && Subtarget->hasV6T2Ops() && CI->isNegative()) {
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unsigned Imm = (unsigned)~(CI->getSExtValue());
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bool EncodeImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) :
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bool UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) :
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(ARM_AM::getSOImmVal(Imm) != -1);
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if (EncodeImm) {
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if (UseImm) {
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unsigned Opc = isThumb2 ? ARM::t2MVNi : ARM::MVNi;
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unsigned ImmReg = createResultReg(TLI.getRegClassFor(MVT::i32));
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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@ -1232,25 +1232,25 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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// Check to see if the 2nd operand is a constant that we can encode directly
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// in the compare.
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int EncodedImm = 0;
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bool EncodeImm = false;
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int Imm = 0;
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bool UseImm = false;
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bool isNegativeImm = false;
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if (const ConstantInt *ConstInt = dyn_cast<ConstantInt>(Src2Value)) {
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if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 ||
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SrcVT == MVT::i1) {
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const APInt &CIVal = ConstInt->getValue();
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EncodedImm = (isZExt) ? (int)CIVal.getZExtValue() : (int)CIVal.getSExtValue();
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if (EncodedImm < 0) {
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Imm = (isZExt) ? (int)CIVal.getZExtValue() : (int)CIVal.getSExtValue();
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if (Imm < 0) {
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isNegativeImm = true;
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EncodedImm = -EncodedImm;
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Imm = -Imm;
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}
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EncodeImm = isThumb2 ? (ARM_AM::getT2SOImmVal(EncodedImm) != -1) :
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(ARM_AM::getSOImmVal(EncodedImm) != -1);
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UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) :
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(ARM_AM::getSOImmVal(Imm) != -1);
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}
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} else if (const ConstantFP *ConstFP = dyn_cast<ConstantFP>(Src2Value)) {
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if (SrcVT == MVT::f32 || SrcVT == MVT::f64)
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if (ConstFP->isZero() && !ConstFP->isNegative())
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EncodeImm = true;
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UseImm = true;
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}
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unsigned CmpOpc;
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@ -1261,11 +1261,11 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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// TODO: Verify compares.
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case MVT::f32:
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isICmp = false;
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CmpOpc = EncodeImm ? ARM::VCMPEZS : ARM::VCMPES;
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CmpOpc = UseImm ? ARM::VCMPEZS : ARM::VCMPES;
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break;
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case MVT::f64:
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isICmp = false;
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CmpOpc = EncodeImm ? ARM::VCMPEZD : ARM::VCMPED;
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CmpOpc = UseImm ? ARM::VCMPEZD : ARM::VCMPED;
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break;
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case MVT::i1:
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case MVT::i8:
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@ -1274,12 +1274,12 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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// Intentional fall-through.
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case MVT::i32:
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if (isThumb2) {
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if (!EncodeImm)
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if (!UseImm)
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CmpOpc = ARM::t2CMPrr;
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else
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CmpOpc = isNegativeImm ? ARM::t2CMNzri : ARM::t2CMPri;
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} else {
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if (!EncodeImm)
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if (!UseImm)
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CmpOpc = ARM::CMPrr;
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else
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CmpOpc = isNegativeImm ? ARM::CMNzri : ARM::CMPri;
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@ -1291,7 +1291,7 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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if (SrcReg1 == 0) return false;
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unsigned SrcReg2;
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if (!EncodeImm) {
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if (!UseImm) {
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SrcReg2 = getRegForValue(Src2Value);
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if (SrcReg2 == 0) return false;
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}
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@ -1302,14 +1302,14 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt);
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if (ResultReg == 0) return false;
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SrcReg1 = ResultReg;
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if (!EncodeImm) {
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if (!UseImm) {
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ResultReg = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt);
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if (ResultReg == 0) return false;
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SrcReg2 = ResultReg;
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}
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}
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if (!EncodeImm) {
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if (!UseImm) {
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(CmpOpc))
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.addReg(SrcReg1).addReg(SrcReg2));
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@ -1320,7 +1320,7 @@ bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
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// Only add immediate for icmp as the immediate for fcmp is an implicit 0.0.
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if (isICmp)
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MIB.addImm(EncodedImm);
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MIB.addImm(Imm);
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AddOptionalDefs(MIB);
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}
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