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[X86] Simplify some of the autoupgrade code. NFC

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llvm-svn: 271174
This commit is contained in:
Craig Topper 2016-05-29 06:37:33 +00:00
parent 2ee323bf42
commit 99d4129969
1 changed files with 38 additions and 61 deletions
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99
lib/IR/AutoUpgrade.cpp
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@ -304,75 +304,70 @@ bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) {
// Handles upgrading SSE2 and AVX2 PSLLDQ intrinsics by converting them // Handles upgrading SSE2 and AVX2 PSLLDQ intrinsics by converting them
// to byte shuffles. // to byte shuffles.
static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C,
Value *Op, unsigned NumLanes, Value *Op, unsigned Shift) {
unsigned Shift) { Type *ResultTy = Op->getType();
// Each lane is 16 bytes. unsigned NumElts = ResultTy->getVectorNumElements() * 8;
unsigned NumElts = NumLanes * 16;
// Bitcast from a 64-bit element type to a byte element type. // Bitcast from a 64-bit element type to a byte element type.
Op = Builder.CreateBitCast(Op, Type *VecTy = VectorType::get(Type::getInt8Ty(C), NumElts);
VectorType::get(Type::getInt8Ty(C), NumElts), Op = Builder.CreateBitCast(Op, VecTy, "cast");
"cast");
// We'll be shuffling in zeroes. // We'll be shuffling in zeroes.
Value *Res = ConstantVector::getSplat(NumElts, Builder.getInt8(0)); Value *Res = Constant::getNullValue(VecTy);
// If shift is less than 16, emit a shuffle to move the bytes. Otherwise, // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
// we'll just return the zero vector. // we'll just return the zero vector.
if (Shift < 16) { if (Shift < 16) {
SmallVector<Constant*, 32> Idxs; int Idxs[32];
// 256-bit version is split into two 16-byte lanes. // 256-bit version is split into two 16-byte lanes.
for (unsigned l = 0; l != NumElts; l += 16) for (unsigned l = 0; l != NumElts; l += 16)
for (unsigned i = 0; i != 16; ++i) { for (unsigned i = 0; i != 16; ++i) {
unsigned Idx = NumElts + i - Shift; unsigned Idx = NumElts + i - Shift;
if (Idx < NumElts) if (Idx < NumElts)
Idx -= NumElts - 16; // end of lane, switch operand. Idx -= NumElts - 16; // end of lane, switch operand.
Idxs.push_back(Builder.getInt32(Idx + l)); Idxs[l + i] = Idx + l;
} }
Res = Builder.CreateShuffleVector(Res, Op, ConstantVector::get(Idxs)); Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts));
} }
// Bitcast back to a 64-bit element type. // Bitcast back to a 64-bit element type.
return Builder.CreateBitCast(Res, return Builder.CreateBitCast(Res, ResultTy, "cast");
VectorType::get(Type::getInt64Ty(C), 2*NumLanes),
"cast");
} }
// Handles upgrading SSE2 and AVX2 PSRLDQ intrinsics by converting them // Handles upgrading SSE2 and AVX2 PSRLDQ intrinsics by converting them
// to byte shuffles. // to byte shuffles.
static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C,
Value *Op, unsigned NumLanes, Value *Op,
unsigned Shift) { unsigned Shift) {
// Each lane is 16 bytes. Type *ResultTy = Op->getType();
unsigned NumElts = NumLanes * 16; unsigned NumElts = ResultTy->getVectorNumElements() * 8;
// Bitcast from a 64-bit element type to a byte element type. // Bitcast from a 64-bit element type to a byte element type.
Op = Builder.CreateBitCast(Op, Type *VecTy = VectorType::get(Type::getInt8Ty(C), NumElts);
VectorType::get(Type::getInt8Ty(C), NumElts), Op = Builder.CreateBitCast(Op, VecTy, "cast");
"cast");
// We'll be shuffling in zeroes. // We'll be shuffling in zeroes.
Value *Res = ConstantVector::getSplat(NumElts, Builder.getInt8(0)); Value *Res = Constant::getNullValue(VecTy);
// If shift is less than 16, emit a shuffle to move the bytes. Otherwise, // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
// we'll just return the zero vector. // we'll just return the zero vector.
if (Shift < 16) { if (Shift < 16) {
SmallVector<Constant*, 32> Idxs; int Idxs[32];
// 256-bit version is split into two 16-byte lanes. // 256-bit version is split into two 16-byte lanes.
for (unsigned l = 0; l != NumElts; l += 16) for (unsigned l = 0; l != NumElts; l += 16)
for (unsigned i = 0; i != 16; ++i) { for (unsigned i = 0; i != 16; ++i) {
unsigned Idx = i + Shift; unsigned Idx = i + Shift;
if (Idx >= 16) if (Idx >= 16)
Idx += NumElts - 16; // end of lane, switch operand. Idx += NumElts - 16; // end of lane, switch operand.
Idxs.push_back(Builder.getInt32(Idx + l)); Idxs[l + i] = Idx + l;
} }
Res = Builder.CreateShuffleVector(Op, Res, ConstantVector::get(Idxs)); Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts));
} }
// Bitcast back to a 64-bit element type. // Bitcast back to a 64-bit element type.
return Builder.CreateBitCast(Res, return Builder.CreateBitCast(Res, ResultTy, "cast");
VectorType::get(Type::getInt64Ty(C), 2*NumLanes),
"cast");
} }
// UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the // UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the
@ -583,46 +578,28 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts);
Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()),
Constant::getNullValue(MaskTy)); Constant::getNullValue(MaskTy));
} else if (Name == "llvm.x86.sse2.psll.dq") { } else if (Name == "llvm.x86.sse2.psll.dq" ||
// 128-bit shift left specified in bits. Name == "llvm.x86.avx2.psll.dq") {
// 128/256-bit shift left specified in bits.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1, Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0),
Shift / 8); // Shift is in bits. Shift / 8); // Shift is in bits.
} else if (Name == "llvm.x86.sse2.psrl.dq") { } else if (Name == "llvm.x86.sse2.psrl.dq" ||
// 128-bit shift right specified in bits. Name == "llvm.x86.avx2.psrl.dq") {
// 128/256-bit shift right specified in bits.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1, Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0),
Shift / 8); // Shift is in bits. Shift / 8); // Shift is in bits.
} else if (Name == "llvm.x86.avx2.psll.dq") { } else if (Name == "llvm.x86.sse2.psll.dq.bs" ||
// 256-bit shift left specified in bits. Name == "llvm.x86.avx2.psll.dq.bs") {
// 128/256-bit shift left specified in bytes.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2, Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), Shift);
Shift / 8); // Shift is in bits. } else if (Name == "llvm.x86.sse2.psrl.dq.bs" ||
} else if (Name == "llvm.x86.avx2.psrl.dq") { Name == "llvm.x86.avx2.psrl.dq.bs") {
// 256-bit shift right specified in bits. // 128/256-bit shift right specified in bytes.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2, Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), Shift);
Shift / 8); // Shift is in bits.
} else if (Name == "llvm.x86.sse2.psll.dq.bs") {
// 128-bit shift left specified in bytes.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1,
Shift);
} else if (Name == "llvm.x86.sse2.psrl.dq.bs") {
// 128-bit shift right specified in bytes.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1,
Shift);
} else if (Name == "llvm.x86.avx2.psll.dq.bs") {
// 256-bit shift left specified in bytes.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2,
Shift);
} else if (Name == "llvm.x86.avx2.psrl.dq.bs") {
// 256-bit shift right specified in bytes.
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2,
Shift);
} else if (Name == "llvm.x86.sse41.pblendw" || } else if (Name == "llvm.x86.sse41.pblendw" ||
Name == "llvm.x86.sse41.blendpd" || Name == "llvm.x86.sse41.blendpd" ||
Name == "llvm.x86.sse41.blendps" || Name == "llvm.x86.sse41.blendps" ||