RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-11 15:26:07 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Fix schedule model for BFC.

Browse Source 
llvm-svn: 85809
This commit is contained in:
David Goodwin 2009-11-02 17:28:36 +00:00
parent 0c213bed8b
commit 9aa890eab6
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/ARMInstrInfo.td
View File

@ -1205,7 +1205,7 @@ defm BIC : AsI1_bin_irs<0b1110, "bic",
BinOpFrag<(and node:$LHS, (not node:$RHS))>>; BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
def BFC : I<(outs GPR:$dst), (ins GPR:$src, bf_inv_mask_imm:$imm), def BFC : I<(outs GPR:$dst), (ins GPR:$src, bf_inv_mask_imm:$imm),
AddrMode1, Size4Bytes, IndexModeNone, DPFrm, IIC_iALUi, AddrMode1, Size4Bytes, IndexModeNone, DPFrm, IIC_iUNAsi,
"bfc", "\t$dst, $imm", "$src = $dst", "bfc", "\t$dst, $imm", "$src = $dst",
[(set GPR:$dst, (and GPR:$src, bf_inv_mask_imm:$imm))]>, [(set GPR:$dst, (and GPR:$src, bf_inv_mask_imm:$imm))]>,
Requires<[IsARM, HasV6T2]> { Requires<[IsARM, HasV6T2]> {

2
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -787,7 +787,7 @@ defm t2BIC : T2I_bin_w_irs<"bic", BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
let Constraints = "$src = $dst" in let Constraints = "$src = $dst" in
def t2BFC : T2I<(outs GPR:$dst), (ins GPR:$src, bf_inv_mask_imm:$imm), def t2BFC : T2I<(outs GPR:$dst), (ins GPR:$src, bf_inv_mask_imm:$imm),
IIC_iALUi, "bfc", "\t$dst, $imm", IIC_iUNAsi, "bfc", "\t$dst, $imm",
[(set GPR:$dst, (and GPR:$src, bf_inv_mask_imm:$imm))]>; [(set GPR:$dst, (and GPR:$src, bf_inv_mask_imm:$imm))]>;
def t2SBFX : T2I<(outs GPR:$dst), (ins GPR:$src, imm0_31:$lsb, imm0_31:$width), def t2SBFX : T2I<(outs GPR:$dst), (ins GPR:$src, imm0_31:$lsb, imm0_31:$width),