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Run code placement optimization for targets that want it (arm and x86 for now).
llvm-svn: 71726
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@ -620,6 +620,13 @@ public:
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return allowUnalignedMemoryAccesses;
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}
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/// This function returns true if the target would benefit from code placement
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/// optimization.
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/// @brief Determine if the target should perform code placement optimization.
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bool shouldOptimizeCodePlacement() const {
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return benefitFromCodePlacementOpt;
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}
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/// getOptimalMemOpType - Returns the target specific optimal type for load
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/// and store operations as a result of memset, memcpy, and memmove lowering.
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/// It returns MVT::iAny if SelectionDAG should be responsible for
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@ -1652,6 +1659,10 @@ protected:
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/// operations when copying small arrays and other similar tasks.
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/// @brief Indicate whether the target permits unaligned memory accesses.
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bool allowUnalignedMemoryAccesses;
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/// This field specifies whether the target can benefit from code placement
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/// optimization.
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bool benefitFromCodePlacementOpt;
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};
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} // end llvm namespace
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@ -104,6 +104,9 @@ FunctionPass *llvm::createCodePlacementOptPass() {
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/// jcc <cond> C, [exit]
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///
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bool CodePlacementOpt::OptimizeIntraLoopEdges() {
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if (!TLI->shouldOptimizeCodePlacement())
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return false;
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bool Changed = false;
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for (unsigned i = 0, e = UncondJmpMBBs.size(); i != e; ++i) {
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MachineBasicBlock *MBB = UncondJmpMBBs[i].first;
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@ -483,6 +483,7 @@ TargetLowering::TargetLowering(TargetMachine &tm)
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memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
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maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8;
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allowUnalignedMemoryAccesses = false;
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benefitFromCodePlacementOpt = false;
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UseUnderscoreSetJmp = false;
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UseUnderscoreLongJmp = false;
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SelectIsExpensive = false;
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@ -288,6 +288,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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setIfCvtDupBlockSizeLimit(Subtarget->isThumb() ? 0 : 2);
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maxStoresPerMemcpy = 1; //// temporary - rewrite interface to use type
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benefitFromCodePlacementOpt = true;
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}
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const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
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@ -844,6 +844,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
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maxStoresPerMemmove = 3; // For @llvm.memmove -> sequence of stores
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allowUnalignedMemoryAccesses = true; // x86 supports it!
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setPrefLoopAlignment(16);
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benefitFromCodePlacementOpt = true;
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}
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