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Compile this:
void %X(int %A) { %C = setlt int %A, 123 ; <bool> [#uses=1] br bool %C, label %T, label %F T: ; preds = %0 call int %main( int 0 ) ; <int>:0 [#uses=0] ret void F: ; preds = %0 ret void } to this: X: save -96, %o6, %o6 subcc %i0, 122, %l0 bg .LBBX_2 ! F nop ... not this: X: save -96, %o6, %o6 sethi 0, %l0 or %g0, 1, %l1 subcc %i0, 122, %l2 bg .LBBX_4 ! nop .LBBX_3: ! or %g0, %l0, %l1 .LBBX_4: ! subcc %l1, 0, %l0 bne .LBBX_2 ! F nop llvm-svn: 25833
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@ -735,6 +735,28 @@ LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
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abort();
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}
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// Look at LHS/RHS/CC and see if they are a lowered V8 setcc instruction. If so
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// set LHS/RHS and V8CC to the LHS/RHS of the setcc and V8CC to the condition.
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static void LookThroughSetCC(SDOperand &LHS, SDOperand &RHS,
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ISD::CondCode CC, unsigned &V8CC) {
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if (isa<ConstantSDNode>(RHS) && cast<ConstantSDNode>(RHS)->getValue() == 0 &&
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CC == ISD::SETNE &&
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((LHS.getOpcode() == V8ISD::SELECT_ICC &&
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LHS.getOperand(3).getOpcode() == V8ISD::CMPICC) ||
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(LHS.getOpcode() == V8ISD::SELECT_FCC &&
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LHS.getOperand(3).getOpcode() == V8ISD::CMPFCC)) &&
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isa<ConstantSDNode>(LHS.getOperand(0)) &&
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isa<ConstantSDNode>(LHS.getOperand(1)) &&
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cast<ConstantSDNode>(LHS.getOperand(0))->getValue() == 1 &&
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cast<ConstantSDNode>(LHS.getOperand(1))->getValue() == 0) {
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SDOperand CMPCC = LHS.getOperand(3);
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V8CC = cast<ConstantSDNode>(LHS.getOperand(2))->getValue();
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LHS = CMPCC.getOperand(0);
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RHS = CMPCC.getOperand(1);
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}
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}
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SDOperand SparcV8TargetLowering::
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LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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switch (Op.getOpcode()) {
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@ -770,8 +792,14 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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SDOperand LHS = Op.getOperand(2);
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SDOperand RHS = Op.getOperand(3);
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SDOperand Dest = Op.getOperand(4);
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unsigned Opc, V8CC = ~0U;
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// If this is a br_cc of a "setcc", and if the setcc got lowered into
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// an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
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LookThroughSetCC(LHS, RHS, CC, V8CC);
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// Get the condition flag.
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SDOperand CompareFlag;
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if (LHS.getValueType() == MVT::i32) {
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std::vector<MVT::ValueType> VTs;
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VTs.push_back(MVT::i32);
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@ -779,14 +807,16 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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std::vector<SDOperand> Ops;
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Ops.push_back(LHS);
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Ops.push_back(RHS);
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SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
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SDOperand CCN = DAG.getConstant(IntCondCCodeToICC(CC), MVT::i32);
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return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CCN, Cond);
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CompareFlag = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
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if (V8CC == ~0U) V8CC = IntCondCCodeToICC(CC);
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Opc = V8ISD::BRICC;
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} else {
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SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
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SDOperand CCN = DAG.getConstant(FPCondCCodeToFCC(CC), MVT::i32);
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return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CCN, Cond);
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CompareFlag = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
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if (V8CC == ~0U) V8CC = FPCondCCodeToFCC(CC);
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Opc = V8ISD::BRFCC;
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}
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return DAG.getNode(Opc, MVT::Other, Chain, Dest,
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DAG.getConstant(V8CC, MVT::i32), CompareFlag);
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}
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case ISD::SELECT_CC: {
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SDOperand LHS = Op.getOperand(0);
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@ -798,21 +828,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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// If this is a select_cc of a "setcc", and if the setcc got lowered into
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// an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
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if (isa<ConstantSDNode>(RHS) && cast<ConstantSDNode>(RHS)->getValue() == 0&&
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CC == ISD::SETNE &&
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((LHS.getOpcode() == V8ISD::SELECT_ICC &&
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LHS.getOperand(3).getOpcode() == V8ISD::CMPICC) ||
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(LHS.getOpcode() == V8ISD::SELECT_FCC &&
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LHS.getOperand(3).getOpcode() == V8ISD::CMPFCC)) &&
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isa<ConstantSDNode>(LHS.getOperand(0)) &&
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isa<ConstantSDNode>(LHS.getOperand(1)) &&
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cast<ConstantSDNode>(LHS.getOperand(0))->getValue() == 1 &&
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cast<ConstantSDNode>(LHS.getOperand(1))->getValue() == 0) {
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SDOperand CMPCC = LHS.getOperand(3);
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V8CC = cast<ConstantSDNode>(LHS.getOperand(2))->getValue();
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LHS = CMPCC.getOperand(0);
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RHS = CMPCC.getOperand(1);
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}
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LookThroughSetCC(LHS, RHS, CC, V8CC);
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SDOperand CompareFlag;
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if (LHS.getValueType() == MVT::i32) {
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