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[mips] Expand vector truncating stores and extending loads.
llvm-svn: 187667
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@ -53,6 +53,20 @@ MipsSETargetLowering::MipsSETargetLowering(MipsTargetMachine &TM)
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setOperationAction(ISD::BITCAST, VecTys[i], Legal);
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}
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// Expand all truncating stores and extending loads.
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unsigned FirstVT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
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unsigned LastVT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
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for (unsigned VT0 = FirstVT; VT0 <= LastVT; ++VT0) {
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for (unsigned VT1 = FirstVT; VT1 <= LastVT; ++VT1)
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setTruncStoreAction((MVT::SimpleValueType)VT0,
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(MVT::SimpleValueType)VT1, Expand);
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setLoadExtAction(ISD::SEXTLOAD, (MVT::SimpleValueType)VT0, Expand);
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setLoadExtAction(ISD::ZEXTLOAD, (MVT::SimpleValueType)VT0, Expand);
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setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT0, Expand);
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}
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setTargetDAGCombine(ISD::SHL);
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setTargetDAGCombine(ISD::SRA);
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setTargetDAGCombine(ISD::SRL);
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11
test/CodeGen/Mips/dsp-vec-load-store.ll
Normal file
11
test/CodeGen/Mips/dsp-vec-load-store.ll
Normal file
@ -0,0 +1,11 @@
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; RUN: llc -march=mipsel -mattr=+dsp < %s
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@g1 = common global <2 x i8> zeroinitializer, align 2
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@g0 = common global <2 x i8> zeroinitializer, align 2
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define void @extend_load_trunc_store_v2i8() {
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entry:
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%0 = load <2 x i8>* @g1, align 2
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store <2 x i8> %0, <2 x i8>* @g0, align 2
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ret void
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}
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