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Actually use the MachineOperand field for isRegTiedToDefOperand().
The MachineOperand::TiedTo field was maintained, but not used. This patch enables it in isRegTiedToDefOperand() and isRegTiedToUseOperand() which are the actual functions use by the register allocator. llvm-svn: 163153
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@ -799,12 +799,26 @@ public:
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/// check if the register def is tied to a source operand, due to either
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/// two-address elimination or inline assembly constraints. Returns the
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/// first tied use operand index by reference if UseOpIdx is not null.
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bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const;
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bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const {
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const MachineOperand &MO = getOperand(DefOpIdx);
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if (!MO.isReg() || !MO.isDef() || !MO.isTied())
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return false;
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if (UseOpIdx)
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*UseOpIdx = findTiedOperandIdx(DefOpIdx);
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return true;
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}
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/// isRegTiedToDefOperand - Return true if the use operand of the specified
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/// index is tied to an def operand. It also returns the def operand index by
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/// reference if DefOpIdx is not null.
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bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const;
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bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const {
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const MachineOperand &MO = getOperand(UseOpIdx);
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if (!MO.isReg() || !MO.isUse() || !MO.isTied())
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return false;
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if (DefOpIdx)
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*DefOpIdx = findTiedOperandIdx(UseOpIdx);
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return true;
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}
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/// clearKillInfo - Clears kill flags on all operands.
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///
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@ -1241,109 +1241,6 @@ unsigned MachineInstr::findTiedOperandIdx(unsigned OpIdx) const {
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llvm_unreachable("Invalid tied operand on inline asm");
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}
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/// isRegTiedToUseOperand - Given the index of a register def operand,
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/// check if the register def is tied to a source operand, due to either
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/// two-address elimination or inline assembly constraints. Returns the
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/// first tied use operand index by reference is UseOpIdx is not null.
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bool MachineInstr::
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isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx) const {
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if (isInlineAsm()) {
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assert(DefOpIdx > InlineAsm::MIOp_FirstOperand);
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const MachineOperand &MO = getOperand(DefOpIdx);
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if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
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return false;
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// Determine the actual operand index that corresponds to this index.
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unsigned DefNo = 0;
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int FlagIdx = findInlineAsmFlagIdx(DefOpIdx, &DefNo);
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if (FlagIdx < 0)
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return false;
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// Which part of the group is DefOpIdx?
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unsigned DefPart = DefOpIdx - (FlagIdx + 1);
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for (unsigned i = InlineAsm::MIOp_FirstOperand, e = getNumOperands();
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i != e; ++i) {
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const MachineOperand &FMO = getOperand(i);
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if (!FMO.isImm())
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continue;
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if (i+1 >= e || !getOperand(i+1).isReg() || !getOperand(i+1).isUse())
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continue;
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unsigned Idx;
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if (InlineAsm::isUseOperandTiedToDef(FMO.getImm(), Idx) &&
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Idx == DefNo) {
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if (UseOpIdx)
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*UseOpIdx = (unsigned)i + 1 + DefPart;
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return true;
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}
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}
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return false;
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}
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assert(getOperand(DefOpIdx).isDef() && "DefOpIdx is not a def!");
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const MCInstrDesc &MCID = getDesc();
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for (unsigned i = 0, e = MCID.getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = getOperand(i);
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if (MO.isReg() && MO.isUse() &&
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MCID.getOperandConstraint(i, MCOI::TIED_TO) == (int)DefOpIdx) {
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if (UseOpIdx)
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*UseOpIdx = (unsigned)i;
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return true;
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}
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}
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return false;
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}
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/// isRegTiedToDefOperand - Return true if the operand of the specified index
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/// is a register use and it is tied to an def operand. It also returns the def
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/// operand index by reference.
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bool MachineInstr::
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isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx) const {
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if (isInlineAsm()) {
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const MachineOperand &MO = getOperand(UseOpIdx);
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if (!MO.isReg() || !MO.isUse() || MO.getReg() == 0)
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return false;
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// Find the flag operand corresponding to UseOpIdx
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int FlagIdx = findInlineAsmFlagIdx(UseOpIdx);
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if (FlagIdx < 0)
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return false;
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const MachineOperand &UFMO = getOperand(FlagIdx);
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unsigned DefNo;
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if (InlineAsm::isUseOperandTiedToDef(UFMO.getImm(), DefNo)) {
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if (!DefOpIdx)
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return true;
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unsigned DefIdx = InlineAsm::MIOp_FirstOperand;
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// Remember to adjust the index. First operand is asm string, second is
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// the HasSideEffects and AlignStack bits, then there is a flag for each.
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while (DefNo) {
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const MachineOperand &FMO = getOperand(DefIdx);
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assert(FMO.isImm());
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// Skip over this def.
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DefIdx += InlineAsm::getNumOperandRegisters(FMO.getImm()) + 1;
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--DefNo;
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}
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*DefOpIdx = DefIdx + UseOpIdx - FlagIdx;
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return true;
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}
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return false;
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}
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const MCInstrDesc &MCID = getDesc();
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if (UseOpIdx >= MCID.getNumOperands())
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return false;
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const MachineOperand &MO = getOperand(UseOpIdx);
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if (!MO.isReg() || !MO.isUse())
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return false;
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int DefIdx = MCID.getOperandConstraint(UseOpIdx, MCOI::TIED_TO);
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if (DefIdx == -1)
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return false;
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if (DefOpIdx)
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*DefOpIdx = (unsigned)DefIdx;
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return true;
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}
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/// clearKillInfo - Clears kill flags on all operands.
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///
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void MachineInstr::clearKillInfo() {
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