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Add TargetLowering::isLegalICmpImmediate. It tells LSR what immediate can be folded into target icmp instructions.
llvm-svn: 86858
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@ -1514,6 +1514,14 @@ public:
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return false;
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}
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/// isLegalICmpImmediate - Return true if the specified immediate is legal
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/// icmp immediate, that is the target has icmp instructions which can compare
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/// a register against the immediate without having to materialize the
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/// immediate into a register.
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virtual bool isLegalICmpImmediate(uint64_t Imm) const {
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return true;
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}
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//===--------------------------------------------------------------------===//
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// Div utility functions
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//
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@ -3706,6 +3706,18 @@ bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
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return true;
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}
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/// isLegalICmpImmediate - Return true if the specified immediate is legal
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/// icmp immediate, that is the target has icmp instructions which can compare
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/// a register against the immediate without having to materialize the
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/// immediate into a register.
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bool ARMTargetLowering::isLegalICmpImmediate(uint64_t Imm) const {
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if (!Subtarget->isThumb())
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return ARM_AM::getSOImmVal(Imm) != -1;
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if (Subtarget->isThumb2())
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return ARM_AM::getT2SOImmVal(Imm) != -1;
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return Imm < 256;
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}
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static bool getARMIndexedAddressParts(SDNode *Ptr, EVT VT,
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bool isSEXTLoad, SDValue &Base,
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SDValue &Offset, bool &isInc,
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@ -180,6 +180,12 @@ namespace llvm {
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virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const;
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bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
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/// isLegalICmpImmediate - Return true if the specified immediate is legal
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/// icmp immediate, that is the target has icmp instructions which can compare
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/// a register against the immediate without having to materialize the
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/// immediate into a register.
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virtual bool isLegalICmpImmediate(uint64_t Imm) const;
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/// getPreIndexedAddressParts - returns true by value, base pointer and
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/// offset pointer and addressing mode by reference if the node's address
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/// can be legally represented as pre-indexed load / store address.
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