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[llvm-exegesis] Remove unused variable, add more semantic to Instruction.
Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53062 llvm-svn: 344127
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@ -175,6 +175,18 @@ bool Instruction::hasAliasingImplicitRegisters() const {
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return ImplDefRegs.anyCommon(ImplUseRegs);
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}
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bool Instruction::hasAliasingImplicitRegistersThrough(
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const Instruction &OtherInstr) const {
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return ImplDefRegs.anyCommon(OtherInstr.ImplUseRegs) &&
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OtherInstr.ImplDefRegs.anyCommon(ImplUseRegs);
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}
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bool Instruction::hasAliasingRegistersThrough(
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const Instruction &OtherInstr) const {
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return AllDefRegs.anyCommon(OtherInstr.AllUseRegs) &&
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OtherInstr.AllDefRegs.anyCommon(AllUseRegs);
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}
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bool Instruction::hasTiedRegisters() const {
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return llvm::any_of(
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Variables, [](const Variable &Var) { return Var.hasTiedOperands(); });
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@ -215,8 +227,10 @@ void Instruction::dump(const llvm::MCRegisterInfo &RegInfo,
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}
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for (const auto &Var : Variables) {
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Stream << "- Var" << Var.getIndex();
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Stream << " (";
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for (auto OperandIndex : Var.TiedOperands)
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Stream << " Op" << OperandIndex;
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Stream << "Op" << OperandIndex;
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Stream << ")";
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Stream << "\n";
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}
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if (hasMemoryOperands())
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@ -44,7 +44,7 @@ struct Variable {
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// The indices of the operands tied to this Variable.
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llvm::SmallVector<unsigned, 2> TiedOperands;
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llvm::MCOperand AssignedValue;
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// The index of this Variable in Instruction.Variables and its associated
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// Value in InstructionBuilder.VariableValues.
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int Index = -1;
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@ -99,25 +99,32 @@ struct Instruction {
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// In case the Variable is tied, the primary (i.e. Def) Operand is returned.
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const Operand &getPrimaryOperand(const Variable &Var) const;
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// Returns whether this instruction has Memory Operands.
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// Repeating this instruction executes sequentially with an instruction that
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// reads or write the same memory region.
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bool hasMemoryOperands() const;
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// Whether this instruction is self aliasing through its tied registers.
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// Repeating this instruction is guaranteed to executes sequentially.
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bool hasTiedRegisters() const;
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// Whether this instruction is self aliasing through its implicit registers.
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// Repeating this instruction is guaranteed to executes sequentially.
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bool hasAliasingImplicitRegisters() const;
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// Whether this instruction is self aliasing through its tied registers.
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// Repeating this instruction is guaranteed to executes sequentially.
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bool hasTiedRegisters() const;
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// Whether this instruction is self aliasing through some registers.
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// Repeating this instruction may execute sequentially by picking aliasing
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// Use and Def registers. It may also execute in parallel by picking non
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// aliasing Use and Def registers.
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bool hasAliasingRegisters() const;
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// Whether this instruction's implicit registers alias with OtherInstr's
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// implicit registers.
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bool hasAliasingImplicitRegistersThrough(const Instruction &OtherInstr) const;
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// Whether this instruction's registers alias with OtherInstr's registers.
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bool hasAliasingRegistersThrough(const Instruction &OtherInstr) const;
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// Returns whether this instruction has Memory Operands.
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// Repeating this instruction executes sequentially with an instruction that
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// reads or write the same memory region.
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bool hasMemoryOperands() const;
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// Convenient function to help with debugging.
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void dump(const llvm::MCRegisterInfo &RegInfo,
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llvm::raw_ostream &Stream) const;
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