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[EarlyCSE] Propagate conditions of AND and OR instructions
This patches teaches EarlyCSE to figure out that if `and i1 %x, %y` is true then both `%x` and `%y` are true in the taken branch, and if `or i1 %x, %y` is false then both `%x` and `%y` are false in non-taken branch. Fix for PR37635. Differential Revision: https://reviews.llvm.org/D47574 Reviewed By: reames llvm-svn: 334707
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@ -719,22 +719,51 @@ bool EarlyCSE::handleBranchCondition(Instruction *CondInst,
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auto *TorF = (BI->getSuccessor(0) == BB)
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? ConstantInt::getTrue(BB->getContext())
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: ConstantInt::getFalse(BB->getContext());
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AvailableValues.insert(CondInst, TorF);
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LLVM_DEBUG(dbgs() << "EarlyCSE CVP: Add conditional value for '"
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<< CondInst->getName() << "' as " << *TorF << " in "
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<< BB->getName() << "\n");
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if (!DebugCounter::shouldExecute(CSECounter)) {
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LLVM_DEBUG(dbgs() << "Skipping due to debug counter\n");
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} else {
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// Replace all dominated uses with the known value.
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if (unsigned Count = replaceDominatedUsesWith(CondInst, TorF, DT,
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BasicBlockEdge(Pred, BB))) {
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auto IsAnd = [](Instruction *I) {
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if (BinaryOperator *BOp = dyn_cast<BinaryOperator>(I))
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return BOp->getOpcode() == Instruction::And;
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return false;
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};
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auto IsOr = [](Instruction *I) {
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if (BinaryOperator *BOp = dyn_cast<BinaryOperator>(I))
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return BOp->getOpcode() == Instruction::Or;
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return false;
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};
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// If the condition is AND operation, we can propagate its operands into the
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// true branch. If it is OR operation, we can propagate them into the false
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// branch.
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auto CanPropagateOperands = (BI->getSuccessor(0) == BB) ? IsAnd : IsOr;
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NumCSECVP += Count;
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return true;
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bool MadeChanges = false;
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SmallVector<Instruction *, 4> WorkList;
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SmallPtrSet<Instruction *, 4> Visited;
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WorkList.push_back(CondInst);
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while (!WorkList.empty()) {
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Instruction *Curr = WorkList.pop_back_val();
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AvailableValues.insert(Curr, TorF);
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LLVM_DEBUG(dbgs() << "EarlyCSE CVP: Add conditional value for '"
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<< Curr->getName() << "' as " << *TorF << " in "
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<< BB->getName() << "\n");
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if (!DebugCounter::shouldExecute(CSECounter)) {
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LLVM_DEBUG(dbgs() << "Skipping due to debug counter\n");
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} else {
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// Replace all dominated uses with the known value.
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if (unsigned Count = replaceDominatedUsesWith(Curr, TorF, DT,
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BasicBlockEdge(Pred, BB))) {
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NumCSECVP += Count;
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MadeChanges = true;
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}
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}
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if (CanPropagateOperands(Curr))
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for (auto &Op : cast<BinaryOperator>(Curr)->operands())
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if (Instruction *OPI = dyn_cast<Instruction>(Op))
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if (SimpleValue::canHandle(OPI) && Visited.insert(OPI).second)
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WorkList.push_back(OPI);
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}
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return false;
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return MadeChanges;
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}
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bool EarlyCSE::processNode(DomTreeNode *Node) {
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144
test/Transforms/EarlyCSE/and_or.ll
Normal file
144
test/Transforms/EarlyCSE/and_or.ll
Normal file
@ -0,0 +1,144 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -early-cse -S < %s | FileCheck %s
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; RUN: opt -basicaa -early-cse-memssa -S < %s | FileCheck %s
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define i32 @test_01(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_01(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: br i1 [[COND]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
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; CHECK: if.true:
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; CHECK-NEXT: ret i32 [[A]]
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; CHECK: if.false:
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; CHECK-NEXT: ret i32 [[B]]
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;
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entry:
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%cond = icmp slt i32 %a, %b
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br i1 %cond, label %if.true, label %if.false
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if.true:
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%cond2 = icmp slt i32 %a, %b
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%x = select i1 %cond2, i32 %a, i32 %b
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ret i32 %x
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if.false:
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%cond3 = icmp slt i32 %a, %b
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%y = select i1 %cond3, i32 %a, i32 %b
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ret i32 %y
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}
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define i32 @test_02(i32 %a, i32 %b, i1 %c) {
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; CHECK-LABEL: @test_02(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[AND_COND:%.*]] = and i1 [[COND]], [[C:%.*]]
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; CHECK-NEXT: br i1 [[AND_COND]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
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; CHECK: if.true:
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; CHECK-NEXT: ret i32 [[A]]
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; CHECK: if.false:
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; CHECK-NEXT: [[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: ret i32 [[Y]]
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;
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entry:
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%cond = icmp slt i32 %a, %b
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%and.cond = and i1 %cond, %c
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br i1 %and.cond, label %if.true, label %if.false
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if.true:
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%cond2 = icmp slt i32 %a, %b
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%x = select i1 %cond2, i32 %a, i32 %b
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ret i32 %x
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if.false:
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%cond3 = icmp slt i32 %a, %b
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%y = select i1 %cond3, i32 %a, i32 %b
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ret i32 %y
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}
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define i32 @test_03(i32 %a, i32 %b, i1 %c) {
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; CHECK-LABEL: @test_03(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[COND]], [[C:%.*]]
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; CHECK-NEXT: br i1 [[OR_COND]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
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; CHECK: if.true:
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; CHECK-NEXT: [[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: ret i32 [[X]]
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; CHECK: if.false:
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; CHECK-NEXT: ret i32 [[B]]
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;
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entry:
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%cond = icmp slt i32 %a, %b
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%or.cond = or i1 %cond, %c
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br i1 %or.cond, label %if.true, label %if.false
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if.true:
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%cond2 = icmp slt i32 %a, %b
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%x = select i1 %cond2, i32 %a, i32 %b
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ret i32 %x
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if.false:
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%cond3 = icmp slt i32 %a, %b
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%y = select i1 %cond3, i32 %a, i32 %b
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ret i32 %y
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}
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define i32 @test_04(i32 %a, i32 %b, i1 %c1, i1 %c2) {
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; CHECK-LABEL: @test_04(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[AND_COND1:%.*]] = and i1 [[COND]], [[C1:%.*]]
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; CHECK-NEXT: [[AND_COND2:%.*]] = and i1 [[AND_COND1]], [[C2:%.*]]
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; CHECK-NEXT: br i1 [[AND_COND2]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
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; CHECK: if.true:
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; CHECK-NEXT: ret i32 [[A]]
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; CHECK: if.false:
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; CHECK-NEXT: [[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: ret i32 [[Y]]
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;
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entry:
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%cond = icmp slt i32 %a, %b
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%and.cond1 = and i1 %cond, %c1
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%and.cond2 = and i1 %and.cond1, %c2
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br i1 %and.cond2, label %if.true, label %if.false
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if.true:
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%cond2 = icmp slt i32 %a, %b
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%x = select i1 %cond2, i32 %a, i32 %b
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ret i32 %x
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if.false:
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%cond3 = icmp slt i32 %a, %b
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%y = select i1 %cond3, i32 %a, i32 %b
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ret i32 %y
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}
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define i32 @test_05(i32 %a, i32 %b, i1 %c1, i1 %c2) {
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; CHECK-LABEL: @test_05(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[OR_COND1:%.*]] = or i1 [[COND]], [[C1:%.*]]
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; CHECK-NEXT: [[OR_COND2:%.*]] = or i1 [[OR_COND1]], [[C2:%.*]]
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; CHECK-NEXT: br i1 [[OR_COND2]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
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; CHECK: if.true:
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; CHECK-NEXT: [[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: ret i32 [[X]]
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; CHECK: if.false:
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; CHECK-NEXT: ret i32 [[B]]
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;
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entry:
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%cond = icmp slt i32 %a, %b
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%or.cond1 = or i1 %cond, %c1
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%or.cond2 = or i1 %or.cond1, %c2
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br i1 %or.cond2, label %if.true, label %if.false
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if.true:
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%cond2 = icmp slt i32 %a, %b
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%x = select i1 %cond2, i32 %a, i32 %b
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ret i32 %x
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if.false:
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%cond3 = icmp slt i32 %a, %b
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%y = select i1 %cond3, i32 %a, i32 %b
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ret i32 %y
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}
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