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be slightly more subtle about skipping dbg_value instructions; otherwise, if a

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dbg_value immediately follows a sequence of ldr/str instructions that should
be combined into an ldm/stm and is the last instruction in the block, then
combine may end up being skipped.

llvm-svn: 105758
This commit is contained in:
Jim Grosbach 2010-06-09 22:21:24 +00:00
parent 0e4d704f16
commit a239e93a5c
1 changed files with 6 additions and 5 deletions
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11
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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@ -1024,10 +1024,6 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
RS->enterBasicBlock(&MBB);
MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
while (MBBI != E) {
if (MBBI->isDebugValue()) {
++MBBI;
continue;
}
if (FixInvalidRegPairOp(MBB, MBBI))
continue;
@ -1094,7 +1090,12 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
}
}
if (Advance) {
if (MBBI->isDebugValue()) {
++MBBI;
if (MBBI == E)
// Reach the end of the block, try merging the memory instructions.
TryMerge = true;
} else if (Advance) {
++Position;
++MBBI;
if (MBBI == E)