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Thread comparisons over udiv/sdiv/ashr/lshr exact and lshr nuw/nsw whenever
possible. This goes into instcombine and instsimplify because instsimplify doesn't need to check hasOneUse since it returns (almost exclusively) constants. This fixes PR9343 #4 #5 and #8! llvm-svn: 127064
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@ -1344,7 +1344,7 @@ static Value *SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS,
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// the compare, and if only one of them is then we moved it to RHS already.
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if (isa<AllocaInst>(LHS) && (isa<GlobalValue>(RHS) || isa<AllocaInst>(RHS) ||
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isa<ConstantPointerNull>(RHS)))
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// We already know that LHS != LHS.
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// We already know that LHS != RHS.
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return ConstantInt::get(ITy, CmpInst::isFalseWhenEqual(Pred));
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// If we are comparing with zero then try hard since this is a common case.
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@ -1700,6 +1700,38 @@ static Value *SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS,
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}
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}
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if (MaxRecurse && LBO && RBO && LBO->getOpcode() == RBO->getOpcode() &&
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LBO->getOperand(1) == RBO->getOperand(1)) {
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switch (LBO->getOpcode()) {
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default: break;
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case Instruction::UDiv:
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case Instruction::LShr:
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if (ICmpInst::isSigned(Pred))
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break;
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// fall-through
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case Instruction::SDiv:
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case Instruction::AShr:
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if (!LBO->isExact() && !RBO->isExact())
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break;
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if (Value *V = SimplifyICmpInst(Pred, LBO->getOperand(0),
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RBO->getOperand(0), TD, DT, MaxRecurse-1))
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return V;
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break;
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case Instruction::Shl: {
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bool NUW = LBO->hasNoUnsignedWrap() && LBO->hasNoUnsignedWrap();
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bool NSW = LBO->hasNoSignedWrap() && RBO->hasNoSignedWrap();
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if (!NUW && !NSW)
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break;
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if (!NSW && ICmpInst::isSigned(Pred))
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break;
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if (Value *V = SimplifyICmpInst(Pred, LBO->getOperand(0),
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RBO->getOperand(0), TD, DT, MaxRecurse-1))
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return V;
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break;
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}
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}
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}
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// If the comparison is with the result of a select instruction, check whether
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// comparing with either branch of the select always yields the same value.
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if (isa<SelectInst>(LHS) || isa<SelectInst>(RHS))
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@ -2393,6 +2393,27 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
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}
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}
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break;
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case Instruction::UDiv:
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case Instruction::LShr:
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if (I.isSigned())
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break;
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// fall-through
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case Instruction::SDiv:
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case Instruction::AShr:
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if (!BO0->isExact() && !BO1->isExact())
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break;
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return new ICmpInst(I.getPredicate(), BO0->getOperand(0),
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BO1->getOperand(0));
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case Instruction::Shl: {
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bool NUW = BO0->hasNoUnsignedWrap() && BO1->hasNoUnsignedWrap();
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bool NSW = BO0->hasNoSignedWrap() && BO1->hasNoSignedWrap();
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if (!NUW && !NSW)
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break;
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if (!NSW && I.isSigned())
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break;
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return new ICmpInst(I.getPredicate(), BO0->getOperand(0),
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BO1->getOperand(0));
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}
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}
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}
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}
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@ -419,3 +419,49 @@ define i1 @test43(i32 %X, i32 %Y) {
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%B = icmp slt i32 %Y, %A
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ret i1 %B
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}
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; CHECK: @test44
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; CHECK: %B = icmp sgt i32 %Y, -1
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define i1 @test44(i32 %X, i32 %Y) {
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%A = srem i32 %X, %Y
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%B = icmp slt i32 %A, %Y
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ret i1 %B
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}
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; CHECK: @test45
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; CHECK: %B = icmp slt i32 %Y, 0
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define i1 @test45(i32 %X, i32 %Y) {
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%A = srem i32 %X, %Y
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%B = icmp slt i32 %Y, %A
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ret i1 %B
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}
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; PR9343 #4
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; CHECK: @test46
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; CHECK: %C = icmp ult i32 %X, %Y
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define i1 @test46(i32 %X, i32 %Y, i32 %Z) {
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%A = ashr exact i32 %X, %Z
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%B = ashr exact i32 %Y, %Z
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%C = icmp ult i32 %A, %B
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ret i1 %C
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}
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; PR9343 #5
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; CHECK: @test47
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; CHECK: %C = icmp ugt i32 %X, %Y
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define i1 @test47(i32 %X, i32 %Y, i32 %Z) {
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%A = ashr exact i32 %X, %Z
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%B = ashr exact i32 %Y, %Z
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%C = icmp ugt i32 %A, %B
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ret i1 %C
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}
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; PR9343 #8
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; CHECK: @test48
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; CHECK: %C = icmp eq i32 %X, %Y
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define i1 @test48(i32 %X, i32 %Y, i32 %Z) {
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%A = sdiv exact i32 %X, %Z
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%B = sdiv exact i32 %Y, %Z
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%C = icmp eq i32 %A, %B
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ret i1 %C
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}
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@ -261,6 +261,15 @@ define i1 @udiv1(i32 %X) {
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; CHECK: ret i1 true
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}
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define i1 @udiv2(i32 %X, i32 %Y, i32 %Z) {
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; CHECK: @udiv2
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%A = udiv exact i32 10, %Z
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%B = udiv exact i32 20, %Z
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%C = icmp ult i32 %A, %B
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ret i1 %C
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; CHECK: ret i1 true
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}
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define i1 @sdiv1(i32 %X) {
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; CHECK: @sdiv1
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%A = sdiv i32 %X, 1000000
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