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Add a couple more things to the readme.
llvm-svn: 25724
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@ -194,6 +194,59 @@ currently only commutes to avoid inserting a copy BEFORE the two addr instr.
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===-------------------------------------------------------------------------===
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===-------------------------------------------------------------------------===
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176.gcc contains a bunch of code like this (this occurs dozens of times):
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int %test(uint %mode.0.i.0) {
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%tmp.79 = cast uint %mode.0.i.0 to sbyte ; <sbyte> [#uses=1]
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%tmp.80 = cast sbyte %tmp.79 to int ; <int> [#uses=1]
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%tmp.81 = shl int %tmp.80, ubyte 16 ; <int> [#uses=1]
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%tmp.82 = and int %tmp.81, 16711680
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ret int %tmp.82
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}
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which we compile to:
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_test:
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extsb r2, r3
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rlwinm r3, r2, 16, 8, 15
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blr
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The extsb is obviously dead. This can be handled by a future thing like
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MaskedValueIsZero that checks to see if bits are ever demanded (in this case,
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the sign bits are never used, so we can fold the sext_inreg to nothing).
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I'm seeing code like this:
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srwi r3, r3, 16
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extsb r3, r3
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rlwimi r4, r3, 16, 8, 15
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in which the extsb is preventing the srwi from being nuked.
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===-------------------------------------------------------------------------===
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Another example that occurs is:
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uint %test(int %specbits.6.1) {
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%tmp.2540 = shr int %specbits.6.1, ubyte 11 ; <int> [#uses=1]
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%tmp.2541 = cast int %tmp.2540 to uint ; <uint> [#uses=1]
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%tmp.2542 = shl uint %tmp.2541, ubyte 13 ; <uint> [#uses=1]
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%tmp.2543 = and uint %tmp.2542, 8192 ; <uint> [#uses=1]
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ret uint %tmp.2543
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}
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which we codegen as:
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l1_test:
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srawi r2, r3, 11
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rlwinm r3, r2, 13, 18, 18
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blr
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the srawi can be nuked by turning the SAR into a logical SHR (the sext bits are
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dead), which I think can then be folded into the rlwinm.
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===-------------------------------------------------------------------------===
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Compile offsets from allocas:
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Compile offsets from allocas:
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int *%test() {
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int *%test() {
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