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https://github.com/RPCS3/llvm-mirror.git
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Change names from RA to something unique to get rid of naming conflicts with
certain linkers... llvm-svn: 36944
This commit is contained in:
Bill Wendling
parent
855b26b72e
commit
a5f8cb0805
@ -47,9 +47,9 @@ namespace {
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static unsigned numIterations = 0;
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static unsigned numIntervals = 0;
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struct VISIBILITY_HIDDEN RA : public MachineFunctionPass {
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struct VISIBILITY_HIDDEN RALinScan : public MachineFunctionPass {
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static char ID;
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RA() : MachineFunctionPass((intptr_t)&ID) {}
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RALinScan() : MachineFunctionPass((intptr_t)&ID) {}
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typedef std::pair<LiveInterval*, LiveInterval::iterator> IntervalPtr;
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typedef std::vector<IntervalPtr> IntervalPtrs;
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@ -149,10 +149,10 @@ namespace {
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}
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}
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};
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char RA::ID = 0;
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char RALinScan::ID = 0;
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}
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void RA::ComputeRelatedRegClasses() {
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void RALinScan::ComputeRelatedRegClasses() {
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const MRegisterInfo &MRI = *mri_;
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// First pass, add all reg classes to the union, and determine at least one
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@ -187,7 +187,7 @@ void RA::ComputeRelatedRegClasses() {
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RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]);
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}
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bool RA::runOnMachineFunction(MachineFunction &fn) {
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bool RALinScan::runOnMachineFunction(MachineFunction &fn) {
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mf_ = &fn;
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tm_ = &fn.getTarget();
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mri_ = tm_->getRegisterInfo();
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@ -222,7 +222,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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/// initIntervalSets - initialize the interval sets.
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///
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void RA::initIntervalSets()
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void RALinScan::initIntervalSets()
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{
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assert(unhandled_.empty() && fixed_.empty() &&
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active_.empty() && inactive_.empty() &&
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@ -237,7 +237,7 @@ void RA::initIntervalSets()
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}
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}
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void RA::linearScan()
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void RALinScan::linearScan()
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{
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// linear scan algorithm
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DOUT << "********** LINEAR SCAN **********\n";
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@ -317,7 +317,7 @@ void RA::linearScan()
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/// processActiveIntervals - expire old intervals and move non-overlapping ones
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/// to the inactive list.
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void RA::processActiveIntervals(unsigned CurPoint)
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void RALinScan::processActiveIntervals(unsigned CurPoint)
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{
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DOUT << "\tprocessing active intervals:\n";
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@ -363,7 +363,7 @@ void RA::processActiveIntervals(unsigned CurPoint)
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/// processInactiveIntervals - expire old intervals and move overlapping
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/// ones to the active list.
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void RA::processInactiveIntervals(unsigned CurPoint)
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void RALinScan::processInactiveIntervals(unsigned CurPoint)
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{
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DOUT << "\tprocessing inactive intervals:\n";
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@ -412,16 +412,18 @@ static void updateSpillWeights(std::vector<float> &Weights,
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Weights[*as] += weight;
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}
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static RA::IntervalPtrs::iterator FindIntervalInVector(RA::IntervalPtrs &IP,
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LiveInterval *LI) {
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for (RA::IntervalPtrs::iterator I = IP.begin(), E = IP.end(); I != E; ++I)
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static
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RALinScan::IntervalPtrs::iterator
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FindIntervalInVector(RALinScan::IntervalPtrs &IP, LiveInterval *LI) {
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for (RALinScan::IntervalPtrs::iterator I = IP.begin(), E = IP.end();
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I != E; ++I)
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if (I->first == LI) return I;
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return IP.end();
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}
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static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
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static void RevertVectorIteratorsTo(RALinScan::IntervalPtrs &V, unsigned Point){
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for (unsigned i = 0, e = V.size(); i != e; ++i) {
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RA::IntervalPtr &IP = V[i];
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RALinScan::IntervalPtr &IP = V[i];
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LiveInterval::iterator I = std::upper_bound(IP.first->begin(),
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IP.second, Point);
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if (I != IP.first->begin()) --I;
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@ -431,7 +433,7 @@ static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
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/// assignRegOrStackSlotAtInterval - assign a register if one is available, or
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/// spill.
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void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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{
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DOUT << "\tallocating current interval: ";
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@ -752,7 +754,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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/// getFreePhysReg - return a free physical register for this virtual register
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/// interval if we have one, otherwise return 0.
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unsigned RA::getFreePhysReg(LiveInterval *cur) {
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unsigned RALinScan::getFreePhysReg(LiveInterval *cur) {
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std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
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unsigned MaxInactiveCount = 0;
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@ -821,5 +823,5 @@ unsigned RA::getFreePhysReg(LiveInterval *cur) {
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}
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FunctionPass* llvm::createLinearScanRegisterAllocator() {
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return new RA();
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return new RALinScan();
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}
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@ -42,10 +42,10 @@ namespace {
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createLocalRegisterAllocator);
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class VISIBILITY_HIDDEN RA : public MachineFunctionPass {
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class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
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public:
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static char ID;
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RA() : MachineFunctionPass((intptr_t)&ID) {}
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RALocal() : MachineFunctionPass((intptr_t)&ID) {}
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private:
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const TargetMachine *TM;
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MachineFunction *MF;
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@ -228,12 +228,12 @@ namespace {
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void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg);
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};
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char RA::ID = 0;
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char RALocal::ID = 0;
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}
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/// getStackSpaceFor - This allocates space for the specified virtual register
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/// to be held on the stack.
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int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
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int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
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// Find the location Reg would belong...
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std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
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@ -253,7 +253,7 @@ int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
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/// removePhysReg - This method marks the specified physical register as no
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/// longer being in use.
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///
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void RA::removePhysReg(unsigned PhysReg) {
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void RALocal::removePhysReg(unsigned PhysReg) {
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PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
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std::vector<unsigned>::iterator It =
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@ -267,8 +267,9 @@ void RA::removePhysReg(unsigned PhysReg) {
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/// virtual register slot specified by VirtReg. It then updates the RA data
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/// structures to indicate the fact that PhysReg is now available.
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///
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void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned PhysReg) {
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void RALocal::spillVirtReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned PhysReg) {
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assert(VirtReg && "Spilling a physical register is illegal!"
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" Must not have appropriate kill for the register or use exists beyond"
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" the intended one.");
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@ -300,8 +301,8 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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/// then the request is ignored if the physical register does not contain a
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/// virtual register.
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///
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void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned PhysReg, bool OnlyVirtRegs) {
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void RALocal::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned PhysReg, bool OnlyVirtRegs) {
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if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
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assert(PhysRegsUsed[PhysReg] != -2 && "Non allocable reg used!");
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if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
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@ -334,7 +335,7 @@ void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
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/// that PhysReg is the proper container for VirtReg now. The physical
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/// register must not be used for anything else when this is called.
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///
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void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
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void RALocal::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
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assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
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// Update information to note the fact that this register was just used, and
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// it holds VirtReg.
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@ -348,7 +349,7 @@ void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
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/// and available for use. This also includes checking to see if aliased
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/// registers are all free...
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///
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bool RA::isPhysRegAvailable(unsigned PhysReg) const {
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bool RALocal::isPhysRegAvailable(unsigned PhysReg) const {
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if (PhysRegsUsed[PhysReg] != -1) return false;
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// If the selected register aliases any other allocated registers, it is
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@ -364,7 +365,7 @@ bool RA::isPhysRegAvailable(unsigned PhysReg) const {
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/// getFreeReg - Look to see if there is a free register available in the
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/// specified register class. If not, return 0.
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///
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unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
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unsigned RALocal::getFreeReg(const TargetRegisterClass *RC) {
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// Get iterators defining the range of registers that are valid to allocate in
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// this class, which also specifies the preferred allocation order.
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TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
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@ -383,8 +384,9 @@ unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
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/// use. If there is currently a value in it, it is either moved out of the way
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/// or spilled to memory.
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///
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void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg) {
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void RALocal::liberatePhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &I,
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unsigned PhysReg) {
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spillPhysReg(MBB, I, PhysReg);
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}
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@ -393,8 +395,8 @@ void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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/// register. If all compatible physical registers are used, this method spills
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/// the last used virtual register to the stack, and uses that register.
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///
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unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned VirtReg) {
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unsigned RALocal::getReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned VirtReg) {
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const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
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// First check to see if we have a free register of the requested type...
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@ -470,8 +472,8 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
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/// subsequent instructions can use the reloaded value. This method returns the
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/// modified instruction.
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///
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MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned OpNum) {
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MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned OpNum) {
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unsigned VirtReg = MI->getOperand(OpNum).getReg();
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// If the virtual register is already available, just update the instruction
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@ -522,7 +524,7 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// loop over each instruction
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MachineBasicBlock::iterator MII = MBB.begin();
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const TargetInstrInfo &TII = *TM->getInstrInfo();
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@ -776,7 +778,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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/// runOnMachineFunction - Register allocate the whole function
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///
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bool RA::runOnMachineFunction(MachineFunction &Fn) {
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bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
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DOUT << "Machine Function " << "\n";
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MF = &Fn;
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TM = &Fn.getTarget();
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@ -812,5 +814,5 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
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}
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FunctionPass *llvm::createLocalRegisterAllocator() {
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return new RA();
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return new RALocal();
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}
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