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SelectionDAG: Handle out-of-bounds index in extract vector element
Summary: This patch correctly handles undef case of EXTRACT_VECTOR_ELT node where the element index is constant and not less than vector size. Test Plan: CodeGen for X86 test included. Also one incorrect regression test fixed. Reviewers: qcolombet, chandlerc, hfinkel Reviewed By: hfinkel Subscribers: hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D9250 llvm-svn: 236584
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@ -3408,6 +3408,10 @@ SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
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if (N1.getOpcode() == ISD::UNDEF)
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return getUNDEF(VT);
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// EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
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if (N2C && N2C->getZExtValue() >= N1.getValueType().getVectorNumElements())
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return getUNDEF(VT);
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// EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
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// expanding copies of large vectors from registers.
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if (N2C &&
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@ -1,7 +1,8 @@
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; RUN: llc < %s -o - -mcpu=generic -march=x86-64 -mattr=+sse4.1 | FileCheck %s -check-prefix=SSE41
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; RUN: llc < %s -o - -mcpu=generic -march=x86-64 -mattr=+avx | FileCheck %s -check-prefix=AVX
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define void @pextrb(i8* nocapture %dst, <16 x i8> %foo) {
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; CHECK-LABEL: extract_i8
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define void @extract_i8(i8* nocapture %dst, <16 x i8> %foo) {
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; AVX: vpextrb
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; SSE41: pextrb
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; AVX-NOT: movb
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@ -11,12 +12,35 @@ define void @pextrb(i8* nocapture %dst, <16 x i8> %foo) {
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ret void
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}
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define void @pextrw(i16* nocapture %dst, <8 x i16> %foo) {
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; CHECK-LABEL: extract_i16
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define void @extract_i16(i16* nocapture %dst, <8 x i16> %foo) {
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; AVX: vpextrw
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; SSE41: pextrw
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; AVX-NOT: movw
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; SSE41-NOT: movw
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%vecext = extractelement <8 x i16> %foo, i32 15
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%vecext = extractelement <8 x i16> %foo, i32 7
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store i16 %vecext, i16* %dst, align 1
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ret void
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}
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; CHECK-LABEL: extract_i8_undef
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define void @extract_i8_undef(i8* nocapture %dst, <16 x i8> %foo) {
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; AVX-NOT: vpextrb
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; SSE41-NOT: pextrb
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; AVX-NOT: movb
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; SSE41-NOT: movb
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%vecext = extractelement <16 x i8> %foo, i32 16 ; undef
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store i8 %vecext, i8* %dst, align 1
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ret void
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}
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; CHECK-LABEL: extract_i16_undef
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define void @extract_i16_undef(i16* nocapture %dst, <8 x i16> %foo) {
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; AVX-NOT: vpextrw
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; SSE41-NOT: pextrw
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; AVX-NOT: movw
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; SSE41-NOT: movw
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%vecext = extractelement <8 x i16> %foo, i32 9 ; undef
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store i16 %vecext, i16* %dst, align 1
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ret void
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}
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51
test/CodeGen/X86/extractelement-index.ll
Normal file
51
test/CodeGen/X86/extractelement-index.ll
Normal file
@ -0,0 +1,51 @@
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; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
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; RUN: llc < %s -march=x86-64 -mattr=+avx | FileCheck %s -check-prefix=AVX
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; CHECK-LABEL: extractelement_index_1:
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define i8 @extractelement_index_1(<32 x i8> %a) nounwind {
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; X64: movaps
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; AVX: vpextrb $1
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%b = extractelement <32 x i8> %a, i256 1
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ret i8 %b
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}
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; CHECK-LABEL: extractelement_index_2:
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define i32 @extractelement_index_2(<8 x i32> %a) nounwind {
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; X64: pshufd
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; AVX: vextractf128 $1
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; AVX-NEXT: vpextrd $3
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%b = extractelement <8 x i32> %a, i64 7
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ret i32 %b
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}
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; CHECK-LABEL: extractelement_index_3:
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define i32 @extractelement_index_3(<8 x i32> %a) nounwind {
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; CHECK-NOT: pextr
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%b = extractelement <8 x i32> %a, i64 15
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ret i32 %b
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}
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; CHECK-LABEL: extractelement_index_4:
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define i32 @extractelement_index_4(<8 x i32> %a) nounwind {
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; X64: movd
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; AVX: vextractf128 $1
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; AVX-NEXT: vmovd
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%b = extractelement <8 x i32> %a, i256 4
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ret i32 %b
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}
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; CHECK-LABEL: extractelement_index_5:
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define i8 @extractelement_index_5(<32 x i8> %a, i256 %i) nounwind {
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; X64: movaps
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; AVX: vmovaps
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%b = extractelement <32 x i8> %a, i256 %i
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ret i8 %b
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}
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; CHECK-LABEL: extractelement_index_6:
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define i8 @extractelement_index_6(<32 x i8> %a) nounwind {
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; CHECK-NOT: pextr
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%b = extractelement <32 x i8> %a, i256 -1
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ret i8 %b
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}
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