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R600: Expand v2i32 load/store instead of custom lowering

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The custom lowering causes llc to crash with a segfault.

Ideally, the custom lowering can be fixed, but this allows
programs which load/store v2i32 to work without crashing.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry<awatry@gmail.com>
llvm-svn: 184480
This commit is contained in:
Tom Stellard 2013-06-20 21:55:23 +00:00
parent cd893c2ca5
commit a6ec00250a
2 changed files with 8 additions and 2 deletions
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4
lib/Target/R600/R600ISelLowering.cpp
View File

@ -86,7 +86,7 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
// Legalize loads and stores to the private address space.
setOperationAction(ISD::LOAD, MVT::i32, Custom);
setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
setOperationAction(ISD::LOAD, MVT::v2i32, Expand);
setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
setLoadExtAction(ISD::EXTLOAD, MVT::v4i8, Custom);
setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
@ -94,7 +94,7 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i8, Custom);
setOperationAction(ISD::STORE, MVT::i8, Custom);
setOperationAction(ISD::STORE, MVT::i32, Custom);
setOperationAction(ISD::STORE, MVT::v2i32, Custom);
setOperationAction(ISD::STORE, MVT::v2i32, Expand);
setOperationAction(ISD::STORE, MVT::v4i32, Custom);
setOperationAction(ISD::LOAD, MVT::i32, Custom);

6
test/CodeGen/R600/load.vec.ll
View File

@ -1,6 +1,10 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s
; load a v2i32 value from the global address space.
; EG-CHECK: @load_v2i32
; EG-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 4
; EG-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
; SI-CHECK: @load_v2i32
; SI-CHECK: BUFFER_LOAD_DWORDX2 VGPR{{[0-9]+}}
define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
@ -10,6 +14,8 @@ define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %i
}
; load a v4i32 value from the global address space.
; EG-CHECK: @load_v4i32
; EG-CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0
; SI-CHECK: @load_v4i32
; SI-CHECK: BUFFER_LOAD_DWORDX4 VGPR{{[0-9]+}}
define void @load_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {