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Follow up to Jim's r138278. This fixes commuteInstruction so it handles two-address instructions correctly. I'll let Jim add a test case. :-)
llvm-svn: 138289
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@ -74,23 +74,25 @@ MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI,
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assert(MI->getOperand(Idx1).isReg() && MI->getOperand(Idx2).isReg() &&
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"This only knows how to commute register operands so far");
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unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0;
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unsigned Reg1 = MI->getOperand(Idx1).getReg();
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unsigned Reg2 = MI->getOperand(Idx2).getReg();
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bool Reg1IsKill = MI->getOperand(Idx1).isKill();
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bool Reg2IsKill = MI->getOperand(Idx2).isKill();
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bool ChangeReg0 = false;
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if (HasDef && MI->getOperand(0).getReg() == Reg1) {
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// Must be two address instruction!
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assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
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"Expecting a two-address instruction!");
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// If destination is tied to either of the commuted source register, then
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// it must be updated.
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if (HasDef && Reg0 == Reg1 &&
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MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
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Reg2IsKill = false;
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ChangeReg0 = true;
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Reg0 = Reg2;
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} else if (HasDef && Reg0 == Reg2 &&
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MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
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Reg1IsKill = false;
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Reg0 = Reg1;
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}
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if (NewMI) {
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// Create a new instruction.
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unsigned Reg0 = HasDef
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? (ChangeReg0 ? Reg2 : MI->getOperand(0).getReg()) : 0;
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bool Reg0IsDead = HasDef ? MI->getOperand(0).isDead() : false;
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MachineFunction &MF = *MI->getParent()->getParent();
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if (HasDef)
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@ -104,8 +106,8 @@ MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI,
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.addReg(Reg1, getKillRegState(Reg2IsKill));
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}
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if (ChangeReg0)
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MI->getOperand(0).setReg(Reg2);
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if (HasDef)
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MI->getOperand(0).setReg(Reg0);
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MI->getOperand(Idx2).setReg(Reg1);
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MI->getOperand(Idx1).setReg(Reg2);
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MI->getOperand(Idx2).setIsKill(Reg1IsKill);
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