Track pristine registers as if they were live-in in the register scavenger.

llvm-svn: 78913
This commit is contained in:
Jakob Stoklund Olesen 2009-08-13 16:20:04 +00:00
parent e6a3eb8852
commit a90cf1b7ea

View File

@ -69,12 +69,18 @@ void RegScavenger::initRegState() {
// Reserved registers are always used. // Reserved registers are always used.
RegsAvailable ^= ReservedRegs; RegsAvailable ^= ReservedRegs;
// Live-in registers are in use. if (!MBB)
if (!MBB || MBB->livein_empty())
return; return;
// Live-in registers are in use.
for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(), for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
E = MBB->livein_end(); I != E; ++I) E = MBB->livein_end(); I != E; ++I)
setUsed(*I); setUsed(*I);
// Pristine CSRs are also unavailable.
BitVector PR = MBB->getParent()->getFrameInfo()->getPristineRegs(MBB);
for (int I = PR.find_first(); I>0; I = PR.find_next(I))
setUsed(I);
} }
void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
@ -370,11 +376,10 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
} }
} }
// If we found an unused register that is defined by a later instruction, // If we found an unused register there is no reason to spill it. We have
// there is no reason to spill it. We have probably found a callee-saved // probably found a callee-saved register that has been saved in the
// register that has been saved in the prologue, but happens to be unused at // prologue, but happens to be unused at this point.
// this point. if (!isAliasUsed(Reg))
if (!isAliasUsed(Reg) && UseMI != NULL)
return Reg; return Reg;
if (Dist >= MaxDist) { if (Dist >= MaxDist) {
@ -391,13 +396,6 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
// Avoid infinite regress // Avoid infinite regress
ScavengedReg = SReg; ScavengedReg = SReg;
// Make sure SReg is marked as used. It could be considered available
// if it is one of the callee saved registers, but hasn't been spilled.
if (!isUsed(SReg)) {
MBB->addLiveIn(SReg);
setUsed(SReg);
}
// Spill the scavenged register before I. // Spill the scavenged register before I.
TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC);
MachineBasicBlock::iterator II = prior(I); MachineBasicBlock::iterator II = prior(I);