[X86][MC] Intel syntax: accept implicit memory operand sizes larger than 80.

The X86AsmParser intel handling was refactored in r216481, making it
try each different memory operand size to see which one matches.
Operand sizes larger than 80 ("[xyz]mmword ptr") were forgotten, which
led to an "invalid operand" error for code such as:
  movdqa [rax], xmm0

llvm-svn: 223187
This commit is contained in:
Ahmed Bougacha 2014-12-03 02:03:26 +00:00
parent c0a1957308
commit ac111e2226
2 changed files with 27 additions and 1 deletions

View File

@ -2626,7 +2626,7 @@ bool X86AsmParser::MatchAndEmitIntelInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVector<unsigned, 8> Match;
uint64_t ErrorInfoMissingFeature = 0;
if (UnsizedMemOp && UnsizedMemOp->isMemUnsized()) {
static const unsigned MopSizes[] = {8, 16, 32, 64, 80};
static const unsigned MopSizes[] = {8, 16, 32, 64, 80, 128, 256, 512};
for (unsigned Size : MopSizes) {
UnsizedMemOp->Mem.Size = Size;
uint64_t ErrorInfoIgnore;

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@ -0,0 +1,26 @@
// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -mcpu=knl %s | FileCheck %s
// Check that we deduce unsized memory operands in the general, unambiguous, case.
// We can't deduce xword memory operands, because there is no instruction
// unambiguously accessing 80-bit memory.
// CHECK: movb %al, (%rax)
mov [rax], al
// CHECK: movw %ax, (%rax)
mov [rax], ax
// CHECK: movl %eax, (%rax)
mov [rax], eax
// CHECK: movq %rax, (%rax)
mov [rax], rax
// CHECK: movdqa %xmm0, (%rax)
movdqa [rax], xmm0
// CHECK: vmovdqa %ymm0, (%rax)
vmovdqa [rax], ymm0
// CHECK: vaddps (%rax), %zmm1, %zmm1
vaddps zmm1, zmm1, [rax]