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This is now partly done.
llvm-svn: 57734
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@ -799,7 +799,7 @@ unsigned long long f6(unsigned long long x, unsigned long long y, int z) {
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}
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}
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On X86-64, we only handle f3/f4 right. On x86-32, several of these
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On X86-64, we only handle f2/f3/f4 right. On x86-32, a few of these
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generate truly horrible code, instead of using shld and friends. On
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ARM, we end up with calls to L___lshrdi3/L___ashldi3 in f, which is
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badness. PPC64 misses f, f5 and f6. CellSPU aborts in isel.
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