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[PowerPC] Use sync inst alias when printing
So long as the choice between printing msync and sync is not ambiguous, we can print 'sync 0' and just 'sync'. llvm-svn: 235663
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@ -3484,7 +3484,7 @@ class PPCAsmPseudo<string asm, dag iops>
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def : InstAlias<"sc", (SC 0)>;
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def : InstAlias<"sync", (SYNC 0)>, Requires<[HasSYNC]>;
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def : InstAlias<"msync", (SYNC 0)>, Requires<[HasSYNC]>;
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def : InstAlias<"msync", (SYNC 0), 0>, Requires<[HasSYNC]>;
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def : InstAlias<"lwsync", (SYNC 1)>, Requires<[HasSYNC]>;
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def : InstAlias<"ptesync", (SYNC 2)>, Requires<[HasSYNC]>;
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@ -21,8 +21,7 @@ define void @fence_release() {
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}
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define void @fence_seq_cst() {
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; CHECK-LABEL: fence_seq_cst
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; CHECK: sync 0
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; PPC440-NOT: sync 0
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; CHECK: sync
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; PPC440: msync
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fence seq_cst
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ret void
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@ -9,7 +9,7 @@
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; Indexed version of loads
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define i8 @load_x_i8_seq_cst([100000 x i8]* %mem) {
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; CHECK-LABEL: load_x_i8_seq_cst
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; CHECK: sync 0
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; CHECK: sync
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; CHECK: lbzx
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; CHECK: lwsync
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%ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000
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@ -46,7 +46,7 @@ define i64 @load_x_i64_unordered([100000 x i64]* %mem) {
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; Indexed version of stores
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define void @store_x_i8_seq_cst([100000 x i8]* %mem) {
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; CHECK-LABEL: store_x_i8_seq_cst
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; CHECK: sync 0
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; CHECK: sync
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; CHECK: stbx
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%ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000
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store atomic i8 42, i8* %ptr seq_cst, align 1
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@ -70,8 +70,7 @@ define void @store_x_i32_monotonic([100000 x i32]* %mem) {
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}
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define void @store_x_i64_unordered([100000 x i64]* %mem) {
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; CHECK-LABEL: store_x_i64_unordered
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; CHECK-NOT: sync 0
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; CHECK-NOT: lwsync
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; CHECK-NOT: sync
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; PPC32: __sync_
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; PPC64-NOT: __sync_
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; PPC64: stdx
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@ -32,7 +32,7 @@ define i32 @load_i32_acquire(i32* %mem) {
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}
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define i64 @load_i64_seq_cst(i64* %mem) {
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; CHECK-LABEL: load_i64_seq_cst
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; CHECK: sync 0
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; CHECK: sync
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; PPC32: __sync_
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; PPC64-NOT: __sync_
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; PPC64: ld
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@ -65,7 +65,7 @@ define void @store_i32_release(i32* %mem) {
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}
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define void @store_i64_seq_cst(i64* %mem) {
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; CHECK-LABEL: store_i64_seq_cst
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; CHECK: sync 0
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; CHECK: sync
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; PPC32: __sync_
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; PPC64-NOT: __sync_
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; PPC64: std
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@ -76,7 +76,7 @@ define void @store_i64_seq_cst(i64* %mem) {
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; Atomic CmpXchg
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define i8 @cas_strong_i8_sc_sc(i8* %mem) {
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; CHECK-LABEL: cas_strong_i8_sc_sc
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; CHECK: sync 0
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; CHECK: sync
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%val = cmpxchg i8* %mem, i8 0, i8 1 seq_cst seq_cst
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; CHECK: lwsync
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%loaded = extractvalue { i8, i1} %val, 0
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@ -116,7 +116,7 @@ define i8 @add_i8_monotonic(i8* %mem, i8 %operand) {
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}
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define i16 @xor_i16_seq_cst(i16* %mem, i16 %operand) {
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; CHECK-LABEL: xor_i16_seq_cst
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; CHECK: sync 0
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; CHECK: sync
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%val = atomicrmw xor i16* %mem, i16 %operand seq_cst
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; CHECK: lwsync
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ret i16 %val
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@ -72,10 +72,10 @@
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# CHECK: ldarx 2, 3, 4, 1
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0x7c 0x43 0x20 0xa9
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# CHECK: sync 0
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# CHECK: sync
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0x7c 0x00 0x04 0xac
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# CHECK: sync 0
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# CHECK: sync
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0x7c 0x00 0x04 0xac
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# CHECK: lwsync
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@ -131,11 +131,11 @@
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# CHECK-LE: ldarx 2, 3, 4, 1 # encoding: [0xa9,0x20,0x43,0x7c]
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ldarx 2, 3, 4, 1
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# CHECK-BE: sync 0 # encoding: [0x7c,0x00,0x04,0xac]
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# CHECK-LE: sync 0 # encoding: [0xac,0x04,0x00,0x7c]
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# CHECK-BE: sync # encoding: [0x7c,0x00,0x04,0xac]
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# CHECK-LE: sync # encoding: [0xac,0x04,0x00,0x7c]
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sync
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# CHECK-BE: sync 0 # encoding: [0x7c,0x00,0x04,0xac]
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# CHECK-LE: sync 0 # encoding: [0xac,0x04,0x00,0x7c]
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# CHECK-BE: sync # encoding: [0x7c,0x00,0x04,0xac]
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# CHECK-LE: sync # encoding: [0xac,0x04,0x00,0x7c]
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msync
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# CHECK-BE: lwsync # encoding: [0x7c,0x20,0x04,0xac]
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# CHECK-LE: lwsync # encoding: [0xac,0x04,0x20,0x7c]
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