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Fix PR17764

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- When selecting BLEND from vselect, the operands need swapping as due to the
  difference between vselect and SSE/AVX's BLEND insn

llvm-svn: 193900
This commit is contained in:
Michael Liao 2013-11-02 00:10:02 +00:00
parent c01bdb27f5
commit ae9a5c1116
2 changed files with 11 additions and 1 deletions
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2
lib/Target/X86/X86InstrSSE.td
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@ -6965,7 +6965,7 @@ let Predicates = [HasAVX] in {
let Predicates = [HasAVX2] in {
def : Pat<(v32i8 (vselect (v32i8 VR256:$mask), (v32i8 VR256:$src1),
(v32i8 VR256:$src2))),
(VPBLENDVBYrr VR256:$src1, VR256:$src2, VR256:$mask)>;
(VPBLENDVBYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
def : Pat<(v16i16 (X86Blendi (v16i16 VR256:$src1), (v16i16 VR256:$src2),
(imm:$mask))),
(VPBLENDWYrri VR256:$src1, VR256:$src2, imm:$mask)>;

10
test/CodeGen/X86/pr17764.ll Normal file
View File

@ -0,0 +1,10 @@
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core-avx2 | FileCheck %s
define <16 x i16> @foo(<16 x i1> %mask, <16 x i16> %x, <16 x i16> %y) {
%ret = select <16 x i1> %mask, <16 x i16> %x, <16 x i16> %y
ret <16 x i16> %ret
}
; CHECK: foo
; CHECK: vpblendvb %ymm0, %ymm1, %ymm2, %ymm0
; CHECK: ret