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assign stable opcodes to the various altivec ops.
llvm-svn: 27741
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@ -102,9 +102,8 @@ struct Operator {
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unsigned short OpNum;
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unsigned short OpNum;
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const char *Name;
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const char *Name;
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Operator(unsigned short shufflemask, const char *name)
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Operator(unsigned short shufflemask, const char *name, unsigned opnum)
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: ShuffleMask(shufflemask), Name(name) {
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: ShuffleMask(shufflemask), OpNum(opnum), Name(name) {
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OpNum = TheOperators.size();
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TheOperators.push_back(this);
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TheOperators.push_back(this);
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}
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}
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~Operator() {
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~Operator() {
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@ -438,37 +437,57 @@ int main() {
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}
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}
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#define GENERATE_ALTIVEC
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#ifdef GENERATE_ALTIVEC
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///===---------------------------------------------------------------------===//
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///===---------------------------------------------------------------------===//
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/// The altivec instruction definitions. This is the altivec-specific part of
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/// The altivec instruction definitions. This is the altivec-specific part of
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/// this file.
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/// this file.
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///===---------------------------------------------------------------------===//
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///===---------------------------------------------------------------------===//
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// Note that the opcode numbers here must match those in the PPC backend.
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enum {
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OP_COPY = 0, // Copy, used for things like <u,u,u,3> to say it is <0,1,2,3>
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OP_VMRGHW,
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OP_VMRGLW,
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OP_VSPLTISW0,
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OP_VSPLTISW1,
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OP_VSPLTISW2,
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OP_VSPLTISW3,
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OP_VSLDOI4,
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OP_VSLDOI8,
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OP_VSLDOI12,
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};
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struct vmrghw : public Operator {
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struct vmrghw : public Operator {
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vmrghw() : Operator(0x0415, "vmrghw") {}
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vmrghw() : Operator(0x0415, "vmrghw", OP_VMRGHW) {}
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} the_vmrghw;
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} the_vmrghw;
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struct vmrglw : public Operator {
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struct vmrglw : public Operator {
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vmrglw() : Operator(0x2637, "vmrglw") {}
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vmrglw() : Operator(0x2637, "vmrglw", OP_VMRGLW) {}
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} the_vmrglw;
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} the_vmrglw;
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template<unsigned Elt>
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template<unsigned Elt>
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struct vspltisw : public Operator {
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struct vspltisw : public Operator {
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vspltisw(const char *N) : Operator(MakeMask(Elt, Elt, Elt, Elt), N) {}
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vspltisw(const char *N, unsigned Opc)
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: Operator(MakeMask(Elt, Elt, Elt, Elt), N, Opc) {}
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};
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};
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vspltisw<0> the_vspltisw0("vspltisw0");
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vspltisw<0> the_vspltisw0("vspltisw0", OP_VSPLTISW0);
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vspltisw<1> the_vspltisw1("vspltisw1");
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vspltisw<1> the_vspltisw1("vspltisw1", OP_VSPLTISW1);
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vspltisw<2> the_vspltisw2("vspltisw2");
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vspltisw<2> the_vspltisw2("vspltisw2", OP_VSPLTISW2);
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vspltisw<3> the_vspltisw3("vspltisw3");
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vspltisw<3> the_vspltisw3("vspltisw3", OP_VSPLTISW3);
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template<unsigned N>
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template<unsigned N>
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struct vsldoi : public Operator {
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struct vsldoi : public Operator {
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vsldoi(const char *n) : Operator(MakeMask(N&7, (N+1)&7, (N+2)&7, (N+3)&7), n){
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vsldoi(const char *Name, unsigned Opc)
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: Operator(MakeMask(N&7, (N+1)&7, (N+2)&7, (N+3)&7), Name, Opc) {
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}
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}
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};
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};
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vsldoi<1> the_vsldoi1("vsldoi4");
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vsldoi<1> the_vsldoi1("vsldoi4" , OP_VSLDOI4);
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vsldoi<2> the_vsldoi2("vsldoi8");
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vsldoi<2> the_vsldoi2("vsldoi8" , OP_VSLDOI8);
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vsldoi<3> the_vsldoi3("vsldoi12");
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vsldoi<3> the_vsldoi3("vsldoi12", OP_VSLDOI12);
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#endif
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