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ARM ldm/stm register lists can be out of order.

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It's not a good style idea, as the registers will be laid down in memory in
numerical order, not the order they're in the list, but it's legal. vldm/vstm
are stricter.

rdar://11064740

llvm-svn: 152943
This commit is contained in:
Jim Grosbach 2012-03-16 20:48:38 +00:00
parent 9343ed10c6
commit af19922301
2 changed files with 7 additions and 3 deletions
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8
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -2854,8 +2854,12 @@ parseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
if (!RC->contains(Reg))
return Error(RegLoc, "invalid register in register list");
// List must be monotonically increasing.
if (getARMRegisterNumbering(Reg) < getARMRegisterNumbering(OldReg))
return Error(RegLoc, "register list not in ascending order");
if (getARMRegisterNumbering(Reg) < getARMRegisterNumbering(OldReg)) {
if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg))
Warning(RegLoc, "register list not in ascending order");
else
return Error(RegLoc, "register list not in ascending order");
}
if (getARMRegisterNumbering(Reg) == getARMRegisterNumbering(OldReg)) {
Warning(RegLoc, "duplicated register (" + RegTok.getString() +
") in register list");

2
test/MC/ARM/diagnostics.s
View File

@ -216,7 +216,7 @@
@ Out of order STM registers
stmda sp!, {r5, r2}
@ CHECK-ERRORS: error: register list not in ascending order
@ CHECK-ERRORS: warning: register list not in ascending order
@ CHECK-ERRORS: stmda sp!, {r5, r2}
@ CHECK-ERRORS: ^