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Rework some .ARM.attribute work for improved gcc compatibility.
Unified EmitTextAttribute for both Asm and Obj emission (.cpu only) Added necessary cortex-A8 related attrs for codegen compat tests. llvm-svn: 124995
This commit is contained in:
Jason W Kim
parent
1c1b342a62
commit
b0d4492aa1
@ -66,6 +66,7 @@ namespace {
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public:
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virtual void MaybeSwitchVendor(StringRef Vendor) = 0;
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virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0;
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virtual void EmitTextAttribute(unsigned Attribute, StringRef String) = 0;
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virtual void Finish() = 0;
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virtual ~AttributeEmitter() {}
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};
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@ -82,6 +83,14 @@ namespace {
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Twine(Attribute) + ", " + Twine(Value));
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}
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void EmitTextAttribute(unsigned Attribute, StringRef String) {
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switch (Attribute) {
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case ARMBuildAttrs::CPU_name:
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Streamer.EmitRawText(StringRef("\t.cpu ") + String);
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break;
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default: assert(0 && "Unsupported Text attribute in ASM Mode"); break;
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}
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}
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void Finish() { }
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};
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@ -115,6 +124,12 @@ namespace {
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Contents += Value;
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}
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void EmitTextAttribute(unsigned Attribute, StringRef String) {
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Contents += Attribute;
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Contents += String;
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Contents += 0;
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}
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void Finish() {
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const size_t ContentsSize = Contents.size();
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@ -449,32 +464,53 @@ void ARMAsmPrinter::emitAttributes() {
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AttrEmitter->MaybeSwitchVendor("aeabi");
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std::string CPUString = Subtarget->getCPUString();
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if (OutStreamer.hasRawTextSupport()) {
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if (CPUString != "generic")
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OutStreamer.EmitRawText(StringRef("\t.cpu ") + CPUString);
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} else {
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assert(CPUString == "generic" && "Unsupported .cpu attribute for ELF/.o");
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if (CPUString == "cortex-a8" ||
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Subtarget->isCortexA8()) {
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AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "CORTEX-A8");
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AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile,
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ARMBuildAttrs::ApplicationProfile);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use,
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ARMBuildAttrs::Allowed);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
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ARMBuildAttrs::AllowThumb32);
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// Fixme: figure out when this is emitted.
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//AttrEmitter->EmitAttribute(ARMBuildAttrs::WMMX_arch,
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// ARMBuildAttrs::AllowWMMXv1);
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//
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/// ADD additional Else-cases here!
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} else if (CPUString == "generic") {
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// FIXME: Why these defaults?
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AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 1);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 1);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use,
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ARMBuildAttrs::Allowed);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
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ARMBuildAttrs::Allowed);
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}
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// FIXME: Emit FPU type
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if (Subtarget->hasVFP2())
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AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 2);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch,
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ARMBuildAttrs::AllowFPv2);
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// Signal various FP modes.
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if (!UnsafeFPMath) {
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 1);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 1);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal,
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ARMBuildAttrs::Allowed);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions,
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ARMBuildAttrs::Allowed);
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}
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if (NoInfsFPMath && NoNaNsFPMath)
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 1);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model,
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ARMBuildAttrs::Allowed);
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else
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 3);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model,
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ARMBuildAttrs::AllowIEE754);
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// FIXME: add more flags to ARMBuildAttrs.h
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// 8-bytes alignment stuff.
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1);
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AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1);
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@ -486,7 +522,8 @@ void ARMAsmPrinter::emitAttributes() {
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}
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// FIXME: Should we signal R9 usage?
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AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1);
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if (Subtarget->hasDivide())
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AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1);
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AttrEmitter->Finish();
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delete AttrEmitter;
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@ -92,6 +92,40 @@ namespace ARMBuildAttrs {
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v7E_M = 13 // v7_M with DSP extensions
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};
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enum CPUArchProfile { // (=7), uleb128
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Not_Applicable = 0, // pre v7, or cross-profile code
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ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
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RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4)
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MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3)
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SystemProfile = (0x53) // 'S' Application or real-time profile
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};
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// The following have a lot of common use cases
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enum {
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//ARMISAUse (=8), uleb128 and THUMBISAUse (=9), uleb128
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Not_Allowed = 0,
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Allowed = 1,
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// FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
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AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
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AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA)
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AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31
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AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA)
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AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
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// Tag_WMMX_arch, (=11), uleb128
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AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
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// Tag_WMMX_arch, (=11), uleb128
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AllowWMMXv1 = 2, // The user permitted this entity to use WMMX v2
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// Tag_ABI_FP_denormal, (=20), uleb128
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PreserveFPSign = 2, // sign when flushed-to-zero is preserved
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// Tag_ABI_FP_number_model, (=23), uleb128
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AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI])
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AllowIEE754 = 3 // this code to use all the IEEE 754-defined FP encodings
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};
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}
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#endif // __TARGET_ARMBUILDATTRS_H__
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@ -2,11 +2,11 @@
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; This tests that MC/asm header conversion is smooth
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;
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; CHECK: .syntax unified
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; CHECK-NEXT: .eabi_attribute 20, 1
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; CHECK-NEXT: .eabi_attribute 21, 1
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; CHECK-NEXT: .eabi_attribute 23, 3
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; CHECK-NEXT: .eabi_attribute 24, 1
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; CHECK-NEXT: .eabi_attribute 25, 1
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; CHECK: .eabi_attribute 20, 1
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; CHECK: .eabi_attribute 21, 1
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; CHECK: .eabi_attribute 23, 3
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; CHECK: .eabi_attribute 24, 1
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; CHECK: .eabi_attribute 25, 1
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define i32 @f(i64 %z) {
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ret i32 0
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@ -1,18 +1,36 @@
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; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \
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; RUN: elf-dump --dump-section-data | FileCheck %s
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; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=BASIC %s
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; RUN: llc %s -mtriple=armv7-linux-gnueabi -march=arm -mcpu=cortex-a8 \
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; RUN: -mattr=-neon -mattr=+vfp2 \
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; RUN: -arm-reserve-r9 -filetype=obj -o - | \
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; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=CORTEXA8 %s
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; This tests that the extpected ARM attributes are emitted.
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;
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; CHECK: .ARM.attributes
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; CHECK-NEXT: 0x70000003
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; CHECK-NEXT: 0x00000000
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; CHECK-NEXT: 0x00000000
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; CHECK-NEXT: 0x0000003c
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; CHECK-NEXT: 0x00000022
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; CHECK-NEXT: 0x00000000
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; CHECK-NEXT: 0x00000000
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; CHECK-NEXT: 0x00000001
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; CHECK-NEXT: 0x00000000
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; CHECK-NEXT: '41210000 00616561 62690001 17000000 06020801 09011401 15011703 18011901 2c01'
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; BASIC: .ARM.attributes
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; BASIC-NEXT: 0x70000003
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; BASIC-NEXT: 0x00000000
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; BASIC-NEXT: 0x00000000
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; BASIC-NEXT: 0x0000003c
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; BASIC-NEXT: 0x00000020
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; BASIC-NEXT: 0x00000000
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; BASIC-NEXT: 0x00000000
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; BASIC-NEXT: 0x00000001
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; BASIC-NEXT: 0x00000000
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; BASIC-NEXT: '411f0000 00616561 62690001 15000000 06020801 09011401 15011703 18011901'
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; CORTEXA8: .ARM.attributes
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; CORTEXA8-NEXT: 0x70000003
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; CORTEXA8-NEXT: 0x00000000
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; CORTEXA8-NEXT: 0x00000000
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; CORTEXA8-NEXT: 0x0000003c
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; CORTEXA8-NEXT: 0x0000002f
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; CORTEXA8-NEXT: 0x00000000
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; CORTEXA8-NEXT: 0x00000000
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; CORTEXA8-NEXT: 0x00000001
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; CORTEXA8-NEXT: 0x00000000
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; CORTEXA8-NEXT: '412e0000 00616561 62690001 24000000 05434f52 5445582d 41380006 0a074108 0109020a 02140115 01170318 011901'
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define i32 @f(i64 %z) {
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ret i32 0
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