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Tidy up the ScheduleDAG class definition a little. Make a few
more member functions protected, and group all the protected members together. llvm-svn: 63932
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@ -446,30 +446,10 @@ namespace llvm {
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MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End);
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MachineBasicBlock::iterator End);
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/// BuildSchedGraph - Build SUnits and set up their Preds and Succs
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/// to form the scheduling dependency graph.
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///
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virtual void BuildSchedGraph() = 0;
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/// ComputeLatency - Compute node latency.
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///
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virtual void ComputeLatency(SUnit *SU) = 0;
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protected:
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/// EmitNoop - Emit a noop instruction.
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///
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void EmitNoop();
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public:
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virtual MachineBasicBlock *EmitSchedule() = 0;
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virtual MachineBasicBlock *EmitSchedule() = 0;
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void dumpSchedule() const;
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void dumpSchedule() const;
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/// Schedule - Order nodes according to selected style, filling
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/// in the Sequence member.
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///
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virtual void Schedule() = 0;
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virtual void dumpNode(const SUnit *SU) const = 0;
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virtual void dumpNode(const SUnit *SU) const = 0;
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/// getGraphNodeLabel - Return a label for an SUnit node in a visualization
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/// getGraphNodeLabel - Return a label for an SUnit node in a visualization
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@ -487,15 +467,33 @@ namespace llvm {
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#endif
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#endif
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protected:
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protected:
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void AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO);
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/// BuildSchedGraph - Build SUnits and set up their Preds and Succs
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/// to form the scheduling dependency graph.
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///
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virtual void BuildSchedGraph() = 0;
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void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap);
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/// ComputeLatency - Compute node latency.
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///
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virtual void ComputeLatency(SUnit *SU) = 0;
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/// Schedule - Order nodes according to selected style, filling
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/// in the Sequence member.
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///
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virtual void Schedule() = 0;
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/// ForceUnitLatencies - Return true if all scheduling edges should be given a
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/// ForceUnitLatencies - Return true if all scheduling edges should be given a
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/// latency value of one. The default is to return false; schedulers may
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/// latency value of one. The default is to return false; schedulers may
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/// override this as needed.
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/// override this as needed.
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virtual bool ForceUnitLatencies() const { return false; }
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virtual bool ForceUnitLatencies() const { return false; }
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/// EmitNoop - Emit a noop instruction.
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///
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void EmitNoop();
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void AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO);
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void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap);
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private:
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private:
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/// EmitLiveInCopy - Emit a copy for a live in physical register. If the
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/// EmitLiveInCopy - Emit a copy for a live in physical register. If the
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/// physical register has only a single copy use, then coalesced the copy
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/// physical register has only a single copy use, then coalesced the copy
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