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[ARM][ParallelDSP] Fix for sext input
The incoming accumulator value can be discovered through a sext, in which case there will be a mismatch between the input and the result. So sign extend the accumulator input if we're performing a 64-bit mac. Differential Revision: https://reviews.llvm.org/D67220 llvm-svn: 371370
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@ -154,6 +154,8 @@ namespace {
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bool is64Bit() const { return Root->getType()->isIntegerTy(64); }
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Type *getType() const { return Root->getType(); }
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/// Return the incoming value to be accumulated. This maybe null.
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Value *getAccumulator() { return Acc; }
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@ -652,9 +654,9 @@ void ARMParallelDSP::InsertParallelMACs(Reduction &R) {
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Value *Mul = MulCand->Root;
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LLVM_DEBUG(dbgs() << "Accumulating unpaired mul: " << *Mul << "\n");
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if (R.getRoot()->getType() != Mul->getType()) {
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if (R.getType() != Mul->getType()) {
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assert(R.is64Bit() && "expected 64-bit result");
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Mul = Builder.CreateSExt(Mul, R.getRoot()->getType());
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Mul = Builder.CreateSExt(Mul, R.getType());
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}
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if (!Acc) {
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@ -666,10 +668,14 @@ void ARMParallelDSP::InsertParallelMACs(Reduction &R) {
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InsertAfter = cast<Instruction>(Acc);
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}
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if (!Acc)
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if (!Acc) {
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Acc = R.is64Bit() ?
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ConstantInt::get(IntegerType::get(M->getContext(), 64), 0) :
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ConstantInt::get(IntegerType::get(M->getContext(), 32), 0);
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} else if (Acc->getType() != R.getType()) {
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Builder.SetInsertPoint(R.getRoot());
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Acc = Builder.CreateSExt(Acc, R.getType());
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}
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IntegerType *Ty = IntegerType::get(M->getContext(), 32);
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for (auto &Pair : R.getMulPairs()) {
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@ -1,4 +1,4 @@
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; RUN: opt -arm-parallel-dsp -mtriple=armv7-a -S %s -o - | FileCheck %s
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; RUN: opt -arm-parallel-dsp -dce -mtriple=armv7-a -S %s -o - | FileCheck %s
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; CHECK-LABEL: single_block
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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186
test/CodeGen/ARM/ParallelDSP/sext-acc.ll
Normal file
186
test/CodeGen/ARM/ParallelDSP/sext-acc.ll
Normal file
@ -0,0 +1,186 @@
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; RUN: opt -arm-parallel-dsp -dce -mtriple=armv7-a -S %s -o - | FileCheck %s
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; CHECK-LABEL: sext_acc_1
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
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; CHECK: call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
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define i64 @sext_acc_1(i16* %a, i16* %b, i32 %acc) {
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entry:
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.1 = load i16, i16* %addr.a.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%sext.mul.0 = sext i32 %mul.0 to i64
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%sext.mul.1 = sext i32 %mul.1 to i64
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%add = add i64 %sext.mul.0, %sext.mul.1
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%sext.acc = sext i32 %acc to i64
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%res = add i64 %add, %sext.acc
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ret i64 %res
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}
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; CHECK-LABEL: sext_acc_2
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[CAST_A_2:%[^ ]+]] = bitcast i16* %addr.a.2 to i32*
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; CHECK: [[A_2:%[^ ]+]] = load i32, i32* %4
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; CHECK: [[CAST_B_2:%[^ ]+]] = bitcast i16* %addr.b.2 to i32*
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; CHECK: [[B_2:%[^ ]+]] = load i32, i32* %6
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; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
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; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
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; CHECK: call i64 @llvm.arm.smlald(i32 [[A_2]], i32 [[B_2]], i64 [[SMLALD]])
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define i64 @sext_acc_2(i16* %a, i16* %b, i32 %acc) {
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entry:
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.1 = load i16, i16* %addr.a.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%sext.mul.0 = sext i32 %mul.0 to i64
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%sext.mul.1 = sext i32 %mul.1 to i64
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%add = add i64 %sext.mul.0, %sext.mul.1
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%sext.acc = sext i32 %acc to i64
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%add.1 = add i64 %add, %sext.acc
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%ld.a.2 = load i16, i16* %addr.a.2
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%ld.b.2 = load i16, i16* %addr.b.2
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%mul.2 = mul i32 %sext.a.2, %sext.b.2
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%sext.mul.2 = sext i32 %mul.2 to i64
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%addr.a.3 = getelementptr i16, i16* %a, i32 3
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%addr.b.3 = getelementptr i16, i16* %b, i32 3
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%ld.a.3 = load i16, i16* %addr.a.3
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%sext.a.3 = sext i16 %ld.a.3 to i32
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%ld.b.3 = load i16, i16* %addr.b.3
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%sext.b.3 = sext i16 %ld.b.3 to i32
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%mul.3 = mul i32 %sext.a.3, %sext.b.3
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%sext.mul.3 = sext i32 %mul.3 to i64
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%add.2 = add i64 %sext.mul.2, %sext.mul.3
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%add.3 = add i64 %add.1, %add.2
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ret i64 %add.3
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}
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; CHECK-LABEL: sext_acc_3
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[CAST_A_2:%[^ ]+]] = bitcast i16* %addr.a.2 to i32*
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; CHECK: [[A_2:%[^ ]+]] = load i32, i32* %4
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; CHECK: [[CAST_B_2:%[^ ]+]] = bitcast i16* %addr.b.2 to i32*
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; CHECK: [[B_2:%[^ ]+]] = load i32, i32* %6
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; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
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; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
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; CHECK: call i64 @llvm.arm.smlald(i32 [[A_2]], i32 [[B_2]], i64 [[SMLALD]])
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define i64 @sext_acc_3(i16* %a, i16* %b, i32 %acc) {
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entry:
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.1 = load i16, i16* %addr.a.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%sext.mul.0 = sext i32 %mul.0 to i64
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%sext.mul.1 = sext i32 %mul.1 to i64
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%add = add i64 %sext.mul.0, %sext.mul.1
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%ld.a.2 = load i16, i16* %addr.a.2
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%ld.b.2 = load i16, i16* %addr.b.2
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%mul.2 = mul i32 %sext.a.2, %sext.b.2
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%sext.mul.2 = sext i32 %mul.2 to i64
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%addr.a.3 = getelementptr i16, i16* %a, i32 3
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%addr.b.3 = getelementptr i16, i16* %b, i32 3
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%ld.a.3 = load i16, i16* %addr.a.3
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%sext.a.3 = sext i16 %ld.a.3 to i32
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%ld.b.3 = load i16, i16* %addr.b.3
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%sext.b.3 = sext i16 %ld.b.3 to i32
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%mul.3 = mul i32 %sext.a.3, %sext.b.3
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%sext.mul.3 = sext i32 %mul.3 to i64
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%add.1 = add i64 %sext.mul.2, %sext.mul.3
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%add.2 = add i64 %add, %add.1
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%sext.acc = sext i32 %acc to i64
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%add.3 = add i64 %add.2, %sext.acc
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ret i64 %add.3
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}
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; CHECK-LABEL: sext_acc_4
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; CHECK: [[CAST_A:%[^ ]+]] = bitcast i16* %a to i32*
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; CHECK: [[A:%[^ ]+]] = load i32, i32* [[CAST_A]]
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; CHECK: [[CAST_B:%[^ ]+]] = bitcast i16* %b to i32*
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; CHECK: [[B:%[^ ]+]] = load i32, i32* [[CAST_B]]
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; CHECK: [[CAST_A_2:%[^ ]+]] = bitcast i16* %addr.a.2 to i32*
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; CHECK: [[A_2:%[^ ]+]] = load i32, i32* %4
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; CHECK: [[CAST_B_2:%[^ ]+]] = bitcast i16* %addr.b.2 to i32*
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; CHECK: [[B_2:%[^ ]+]] = load i32, i32* %6
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; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
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; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
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; CHECK: call i64 @llvm.arm.smlald(i32 [[A_2]], i32 [[B_2]], i64 [[SMLALD]])
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define i64 @sext_acc_4(i16* %a, i16* %b, i32 %acc) {
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entry:
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%ld.a.0 = load i16, i16* %a
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%sext.a.0 = sext i16 %ld.a.0 to i32
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%ld.b.0 = load i16, i16* %b
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%sext.b.0 = sext i16 %ld.b.0 to i32
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%mul.0 = mul i32 %sext.a.0, %sext.b.0
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%addr.a.1 = getelementptr i16, i16* %a, i32 1
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%addr.b.1 = getelementptr i16, i16* %b, i32 1
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%ld.a.1 = load i16, i16* %addr.a.1
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%sext.a.1 = sext i16 %ld.a.1 to i32
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%ld.b.1 = load i16, i16* %addr.b.1
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%sext.b.1 = sext i16 %ld.b.1 to i32
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%mul.1 = mul i32 %sext.a.1, %sext.b.1
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%add = add i32 %mul.0, %mul.1
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%sext.add = sext i32 %add to i64
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%addr.a.2 = getelementptr i16, i16* %a, i32 2
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%addr.b.2 = getelementptr i16, i16* %b, i32 2
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%ld.a.2 = load i16, i16* %addr.a.2
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%sext.a.2 = sext i16 %ld.a.2 to i32
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%ld.b.2 = load i16, i16* %addr.b.2
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%sext.b.2 = sext i16 %ld.b.2 to i32
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%mul.2 = mul i32 %sext.a.2, %sext.b.2
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%sext.mul.2 = sext i32 %mul.2 to i64
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%addr.a.3 = getelementptr i16, i16* %a, i32 3
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%addr.b.3 = getelementptr i16, i16* %b, i32 3
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%ld.a.3 = load i16, i16* %addr.a.3
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%sext.a.3 = sext i16 %ld.a.3 to i32
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%ld.b.3 = load i16, i16* %addr.b.3
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%sext.b.3 = sext i16 %ld.b.3 to i32
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%mul.3 = mul i32 %sext.a.3, %sext.b.3
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%sext.mul.3 = sext i32 %mul.3 to i64
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%sext.acc = sext i32 %acc to i64
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%add.1 = add i64 %sext.mul.2, %sext.add
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%add.2 = add i64 %sext.add, %add.1
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%add.3 = add i64 %add.2, %sext.mul.3
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%add.4 = add i64 %add.3, %sext.acc
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ret i64 %add.4
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}
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