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* Tabs to spaces

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* Remove unnecessary parens, braces, clean up code layout

llvm-svn: 14379
This commit is contained in:
Misha Brukman 2004-06-24 23:04:11 +00:00
parent 2faa0989d0
commit b312aa9f4b
2 changed files with 200 additions and 192 deletions
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48
lib/Target/PowerPC/PPC32AsmPrinter.cpp
View File

@ -289,8 +289,10 @@ void Printer::emitGlobalConstant(const Constant *CV) {
} U;
U.FVal = Val;
O << ".long\t" << U.T.MSWord << "\t# double most significant word " << Val << "\n";
O << ".long\t" << U.T.LSWord << "\t# double least significant word" << Val << "\n";
O << ".long\t" << U.T.MSWord << "\t# double most significant word "
<< Val << "\n";
O << ".long\t" << U.T.LSWord << "\t# double least significant word"
<< Val << "\n";
return;
}
}
@ -306,8 +308,10 @@ void Printer::emitGlobalConstant(const Constant *CV) {
} U;
U.UVal = CI->getRawValue();
O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word " << U.UVal << "\n";
O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word" << U.UVal << "\n";
O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word "
<< U.UVal << "\n";
O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word"
<< U.UVal << "\n";
return;
}
}
@ -507,19 +511,20 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[5];
ArgType[0] = (Desc.TSFlags>>PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask;
ArgType[1] = (Desc.TSFlags>>PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask;
ArgType[2] = (Desc.TSFlags>>PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask;
ArgType[3] = (Desc.TSFlags>>PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask;
ArgType[4] = (Desc.TSFlags>>PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask;
assert ( ((Desc.TSFlags & PPC32II::VMX) == 0) && "Instruction requires VMX support");
assert ( ((Desc.TSFlags & PPC32II::PPC64) == 0) && "Instruction requires 64 bit support");
assert((Desc.TSFlags & PPC32II::VMX == 0) &&
"Instruction requires VMX support");
assert((Desc.TSFlags & PPC32II::PPC64 == 0) &&
"Instruction requires 64 bit support");
//assert ( ValidOpcodes(MI, ArgType) && "Instruction has invalid inputs");
++EmittedInsts;
if(Opcode == PPC32::MovePCtoLR) {
if (Opcode == PPC32::MovePCtoLR) {
O << "mflr r0\n";
O << "bcl 20,31,L" << CurrentFnName << "$pb\n";
O << "L" << CurrentFnName << "$pb:\n";
@ -530,7 +535,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
DEBUG(std::cerr << TII.getName(MI->getOpcode()) << " expects "
<< ArgCount << " args\n");
if(Opcode == PPC32::LOADLoAddr) {
if (Opcode == PPC32::LOADLoAddr) {
printOp(MI->getOperand(0));
O << ", ";
printOp(MI->getOperand(1));
@ -540,7 +545,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
return;
}
if(Opcode == PPC32::LOADHiAddr) {
if (Opcode == PPC32::LOADHiAddr) {
printOp(MI->getOperand(0));
O << ", ";
printOp(MI->getOperand(1));
@ -550,32 +555,31 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
return;
}
if( (ArgCount == 3) && (ArgType[1] == PPC32II::Disimm16) ) {
if (ArgCount == 3 && ArgType[1] == PPC32II::Disimm16) {
printOp(MI->getOperand(0));
O << ", ";
printOp(MI->getOperand(1));
O << "(";
if((ArgType[2] == PPC32II::Gpr0) && (MI->getOperand(2).getReg() == PPC32::R0)) {
if (ArgType[2] == PPC32II::Gpr0 && MI->getOperand(2).getReg() == PPC32::R0)
O << "0";
} else {
else
printOp(MI->getOperand(2));
}
O << ")\n";
} else {
for(i = 0; i< ArgCount; i++) {
if( (ArgType[i] == PPC32II::Gpr0) && ((MI->getOperand(i).getReg()) == PPC32::R0)) {
if (ArgType[i] == PPC32II::Gpr0 &&
MI->getOperand(i).getReg() == PPC32::R0)
O << "0";
} else {
else {
//std::cout << "DEBUG " << (*(TM.getRegisterInfo())).get(MI->getOperand(i).getReg()).Name << "\n";
printOp(MI->getOperand(i));
}
if( ArgCount - 1 == i) {
if( ArgCount - 1 == i)
O << "\n";
} else {
else
O << ", ";
}
}
}
return;
}
@ -666,9 +670,10 @@ bool Printer::doFinalization(Module &M) {
}
}
for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i) {
for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i)
{
O << ".data\n";
O << ".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
O<<".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
O << "\t.align 2\n";
O << "L" << *i << "$stub:\n";
O << "\t.indirect_symbol " << *i << "\n";
@ -686,7 +691,6 @@ bool Printer::doFinalization(Module &M) {
O << "L" << *i << "$lazy_ptr:\n";
O << ".indirect_symbol " << *i << "\n";
O << ".long dyld_stub_binding_helper\n";
}
delete Mang;

48
lib/Target/PowerPC/PowerPCAsmPrinter.cpp
View File

@ -289,8 +289,10 @@ void Printer::emitGlobalConstant(const Constant *CV) {
} U;
U.FVal = Val;
O << ".long\t" << U.T.MSWord << "\t# double most significant word " << Val << "\n";
O << ".long\t" << U.T.LSWord << "\t# double least significant word" << Val << "\n";
O << ".long\t" << U.T.MSWord << "\t# double most significant word "
<< Val << "\n";
O << ".long\t" << U.T.LSWord << "\t# double least significant word"
<< Val << "\n";
return;
}
}
@ -306,8 +308,10 @@ void Printer::emitGlobalConstant(const Constant *CV) {
} U;
U.UVal = CI->getRawValue();
O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word " << U.UVal << "\n";
O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word" << U.UVal << "\n";
O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word "
<< U.UVal << "\n";
O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word"
<< U.UVal << "\n";
return;
}
}
@ -507,19 +511,20 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[5];
ArgType[0] = (Desc.TSFlags>>PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask;
ArgType[1] = (Desc.TSFlags>>PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask;
ArgType[2] = (Desc.TSFlags>>PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask;
ArgType[3] = (Desc.TSFlags>>PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask;
ArgType[4] = (Desc.TSFlags>>PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask;
assert ( ((Desc.TSFlags & PPC32II::VMX) == 0) && "Instruction requires VMX support");
assert ( ((Desc.TSFlags & PPC32II::PPC64) == 0) && "Instruction requires 64 bit support");
assert((Desc.TSFlags & PPC32II::VMX == 0) &&
"Instruction requires VMX support");
assert((Desc.TSFlags & PPC32II::PPC64 == 0) &&
"Instruction requires 64 bit support");
//assert ( ValidOpcodes(MI, ArgType) && "Instruction has invalid inputs");
++EmittedInsts;
if(Opcode == PPC32::MovePCtoLR) {
if (Opcode == PPC32::MovePCtoLR) {
O << "mflr r0\n";
O << "bcl 20,31,L" << CurrentFnName << "$pb\n";
O << "L" << CurrentFnName << "$pb:\n";
@ -530,7 +535,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
DEBUG(std::cerr << TII.getName(MI->getOpcode()) << " expects "
<< ArgCount << " args\n");
if(Opcode == PPC32::LOADLoAddr) {
if (Opcode == PPC32::LOADLoAddr) {
printOp(MI->getOperand(0));
O << ", ";
printOp(MI->getOperand(1));
@ -540,7 +545,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
return;
}
if(Opcode == PPC32::LOADHiAddr) {
if (Opcode == PPC32::LOADHiAddr) {
printOp(MI->getOperand(0));
O << ", ";
printOp(MI->getOperand(1));
@ -550,32 +555,31 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
return;
}
if( (ArgCount == 3) && (ArgType[1] == PPC32II::Disimm16) ) {
if (ArgCount == 3 && ArgType[1] == PPC32II::Disimm16) {
printOp(MI->getOperand(0));
O << ", ";
printOp(MI->getOperand(1));
O << "(";
if((ArgType[2] == PPC32II::Gpr0) && (MI->getOperand(2).getReg() == PPC32::R0)) {
if (ArgType[2] == PPC32II::Gpr0 && MI->getOperand(2).getReg() == PPC32::R0)
O << "0";
} else {
else
printOp(MI->getOperand(2));
}
O << ")\n";
} else {
for(i = 0; i< ArgCount; i++) {
if( (ArgType[i] == PPC32II::Gpr0) && ((MI->getOperand(i).getReg()) == PPC32::R0)) {
if (ArgType[i] == PPC32II::Gpr0 &&
MI->getOperand(i).getReg() == PPC32::R0)
O << "0";
} else {
else {
//std::cout << "DEBUG " << (*(TM.getRegisterInfo())).get(MI->getOperand(i).getReg()).Name << "\n";
printOp(MI->getOperand(i));
}
if( ArgCount - 1 == i) {
if( ArgCount - 1 == i)
O << "\n";
} else {
else
O << ", ";
}
}
}
return;
}
@ -666,9 +670,10 @@ bool Printer::doFinalization(Module &M) {
}
}
for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i) {
for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i)
{
O << ".data\n";
O << ".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
O<<".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
O << "\t.align 2\n";
O << "L" << *i << "$stub:\n";
O << "\t.indirect_symbol " << *i << "\n";
@ -686,7 +691,6 @@ bool Printer::doFinalization(Module &M) {
O << "L" << *i << "$lazy_ptr:\n";
O << ".indirect_symbol " << *i << "\n";
O << ".long dyld_stub_binding_helper\n";
}
delete Mang;