Avoid spilling EBP / RBP twice in the prologue.

llvm-svn: 56675
This commit is contained in:
Evan Cheng 2008-09-26 19:14:21 +00:00
parent 70a6539add
commit b4d6625c85
3 changed files with 20 additions and 10 deletions

View File

@ -1832,39 +1832,49 @@ void X86InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
}
bool X86InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI) const {
if (CSI.empty())
return false;
bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
unsigned SlotSize = is64Bit ? 8 : 4;
MachineFunction &MF = *MBB.getParent();
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
X86FI->setCalleeSavedFrameSize(CSI.size() * SlotSize);
bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
unsigned FrameReg = is64Bit ? X86::RBP : X86::EBP;
unsigned Opc = is64Bit ? X86::PUSH64r : X86::PUSH32r;
unsigned CSSize = 0;
for (unsigned i = CSI.size(); i != 0; --i) {
unsigned Reg = CSI[i-1].getReg();
if (Reg == FrameReg && RI.hasFP(MF))
// It will be saved as part of the prologue.
continue;
// Add the callee-saved register as live-in. It's killed at the spill.
MBB.addLiveIn(Reg);
BuildMI(MBB, MI, get(Opc)).addReg(Reg);
++CSSize;
}
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
unsigned SlotSize = is64Bit ? 8 : 4;
X86FI->setCalleeSavedFrameSize(CSSize * SlotSize);
return true;
}
bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI) const {
if (CSI.empty())
return false;
MachineFunction &MF = *MBB.getParent();
bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
unsigned FrameReg = is64Bit ? X86::RBP : X86::EBP;
unsigned Opc = is64Bit ? X86::POP64r : X86::POP32r;
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
unsigned Reg = CSI[i].getReg();
if (Reg == FrameReg && RI.hasFP(MF))
// It will be restored as part of the epilogue.
continue;
BuildMI(MBB, MI, get(Opc), Reg);
}
return true;

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@ -1,5 +1,5 @@
; Check that eh_return & unwind_init were properly lowered
; RUN: llvm-as < %s | llc | grep %ebp | count 9
; RUN: llvm-as < %s | llc | grep %ebp | count 7
; RUN: llvm-as < %s | llc | grep %ecx | count 5
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"

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@ -1,5 +1,5 @@
; Check that eh_return & unwind_init were properly lowered
; RUN: llvm-as < %s | llc | grep %rbp | count 7
; RUN: llvm-as < %s | llc | grep %rbp | count 5
; RUN: llvm-as < %s | llc | grep %rcx | count 3
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"