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minor change, simplify some logic

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llvm-svn: 112689
This commit is contained in:
Bruno Cardoso Lopes 2010-09-01 00:57:08 +00:00
parent c31697f68c
commit b69568ab33
1 changed files with 4 additions and 4 deletions
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8
lib/Target/X86/X86ISelLowering.cpp
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@ -5127,10 +5127,10 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
unsigned TargetMask = X86::getShuffleSHUFImmediate(SVOp);
if (HasSSE2 && (VT == MVT::v4f32 || VT == MVT::v4i32))
if (HasSSE2 && NumElems == 4)
return getTargetShuffleNode(X86ISD::PSHUFD, dl, VT, V1, TargetMask, DAG);
if (HasSSE2 && (VT == MVT::v2i64 || VT == MVT::v2f64))
if (HasSSE2 && NumElems == 2)
return getTargetShuffleNode(X86ISD::SHUFPD, dl, VT, V1, V1,
TargetMask, DAG);
@ -5159,10 +5159,10 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
if (ISD::isBuildVectorAllZeros(V1.getNode()))
return getVZextMovL(VT, VT, V2, DAG, Subtarget, dl);
if (!isMMX && !X86::isMOVLPMask(SVOp)) {
if (HasSSE2 && (VT == MVT::v2i64 || VT == MVT::v2f64))
if (HasSSE2 && NumElems == 2)
return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG);
if (VT == MVT::v4i32 || VT == MVT::v4f32)
if (NumElems == 4)
return getTargetShuffleNode(X86ISD::MOVSS, dl, VT, V1, V2, DAG);
}
}