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eliminate the TargetRegisterDesc::AsmName field, the asmprinters now have this table.
llvm-svn: 81728
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fbe97bcd52
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b88e0d1715
@ -41,7 +41,6 @@ class RegScavenger;
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/// of AX.
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/// of AX.
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///
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///
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struct TargetRegisterDesc {
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struct TargetRegisterDesc {
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const char *AsmName; // Assembly language name for the register
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const char *Name; // Printable name for the reg (for debugging)
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const char *Name; // Printable name for the reg (for debugging)
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const unsigned *AliasSet; // Register Alias Set, described above
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const unsigned *AliasSet; // Register Alias Set, described above
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const unsigned *SubRegs; // Sub-register set, described above
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const unsigned *SubRegs; // Sub-register set, described above
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@ -767,7 +767,7 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
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}
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}
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OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
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OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
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OS << " { \"NOREG\",\t\"NOREG\",\t0,\t0,\t0 },\n";
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OS << " { \"NOREG\",\t0,\t0,\t0 },\n";
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// Now that register alias and sub-registers sets have been emitted, emit the
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// Now that register alias and sub-registers sets have been emitted, emit the
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// register descriptors now.
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// register descriptors now.
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@ -775,11 +775,6 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
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for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
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for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
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const CodeGenRegister &Reg = Registers[i];
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const CodeGenRegister &Reg = Registers[i];
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OS << " { \"";
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OS << " { \"";
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if (!Reg.TheDef->getValueAsString("AsmName").empty())
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OS << Reg.TheDef->getValueAsString("AsmName");
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else
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OS << Reg.getName();
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OS << "\",\t\"";
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OS << Reg.getName() << "\",\t";
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OS << Reg.getName() << "\",\t";
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if (RegisterAliases.count(Reg.TheDef))
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if (RegisterAliases.count(Reg.TheDef))
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OS << Reg.getName() << "_AliasSet,\t";
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OS << Reg.getName() << "_AliasSet,\t";
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