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remove an old hack that avoided creating MMX datatypes. The

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X86 backend has been fixed.

llvm-svn: 124064
This commit is contained in:
Chris Lattner 2011-01-23 06:40:33 +00:00
parent 2503c9f9c8
commit ba66871643
2 changed files with 3 additions and 26 deletions
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23
lib/Transforms/Scalar/ScalarReplAggregates.cpp
View File

@ -247,26 +247,6 @@ private:
} // end anonymous namespace.
/// IsVerbotenVectorType - Return true if this is a vector type ScalarRepl isn't
/// allowed to form. We do this to avoid MMX types, which is a complete hack,
/// but is required until the backend is fixed.
static bool IsVerbotenVectorType(const VectorType *VTy, const Instruction *I) {
StringRef Triple(I->getParent()->getParent()->getParent()->getTargetTriple());
if (!Triple.startswith("i386") &&
!Triple.startswith("x86_64"))
return false;
// Reject all the MMX vector types.
switch (VTy->getNumElements()) {
default: return false;
case 1: return VTy->getElementType()->isIntegerTy(64);
case 2: return VTy->getElementType()->isIntegerTy(32);
case 4: return VTy->getElementType()->isIntegerTy(16);
case 8: return VTy->getElementType()->isIntegerTy(8);
}
}
/// TryConvert - Analyze the specified alloca, and if it is safe to do so,
/// rewrite it to be a new alloca which is mem2reg'able. This returns the new
/// alloca if possible or null if not.
@ -283,8 +263,7 @@ AllocaInst *ConvertToScalarInfo::TryConvert(AllocaInst *AI) {
// we just get a lot of insert/extracts. If at least one vector is
// involved, then we probably really do have a union of vector/array.
const Type *NewTy;
if (VectorTy && VectorTy->isVectorTy() && HadAVector &&
!IsVerbotenVectorType(cast<VectorType>(VectorTy), AI)) {
if (VectorTy && VectorTy->isVectorTy() && HadAVector) {
DEBUG(dbgs() << "CONVERT TO VECTOR: " << *AI << "\n TYPE = "
<< *VectorTy << '\n');
NewTy = VectorTy; // Use the vector type.

6
test/Transforms/ScalarRepl/vector_promote.ll
View File

@ -87,8 +87,6 @@ define i32 @test5(float %X) { ;; should turn into bitcast.
}
;; should not turn into <1 x i64> - It is a banned MMX datatype.
;; rdar://8380055
define i64 @test6(<2 x float> %X) {
%X_addr = alloca <2 x float>
store <2 x float> %X, <2 x float>* %X_addr
@ -96,7 +94,7 @@ define i64 @test6(<2 x float> %X) {
%tmp = load i64* %P
ret i64 %tmp
; CHECK: @test6
; CHECK-NEXT: bitcast <2 x float> %X to i64
; CHECK-NEXT: ret i64
; CHECK: bitcast <2 x float> %X to <1 x i64>
; CHECK: ret i64
}