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MachineFunction: Store more specific reference to LLVMTargetMachine; NFC

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MachineFunction can only be used in code using lib/CodeGen, hence we
can keep a more specific reference to LLVMTargetMachine rather than just
TargetMachine around.

Do the same for references in ScheduleDAG and RegUsageInfoCollector.

llvm-svn: 346183
This commit is contained in:
Matthias Braun 2018-11-05 23:49:14 +00:00
parent 5139984739
commit bd8238f4c6
7 changed files with 15 additions and 14 deletions
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8
include/llvm/CodeGen/MachineFunction.h
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@ -58,6 +58,7 @@ class DILocalVariable;
class DILocation;
class Function;
class GlobalValue;
class LLVMTargetMachine;
class MachineConstantPool;
class MachineFrameInfo;
class MachineFunction;
@ -70,7 +71,6 @@ class Pass;
class PseudoSourceValueManager;
class raw_ostream;
class SlotIndexes;
class TargetMachine;
class TargetRegisterClass;
class TargetSubtargetInfo;
struct WasmEHFuncInfo;
@ -225,7 +225,7 @@ struct LandingPadInfo {
class MachineFunction {
const Function &F;
const TargetMachine &Target;
const LLVMTargetMachine &Target;
const TargetSubtargetInfo *STI;
MCContext &Ctx;
MachineModuleInfo &MMI;
@ -388,7 +388,7 @@ public:
using VariableDbgInfoMapTy = SmallVector<VariableDbgInfo, 4>;
VariableDbgInfoMapTy VariableDbgInfos;
MachineFunction(const Function &F, const TargetMachine &Target,
MachineFunction(const Function &F, const LLVMTargetMachine &Target,
const TargetSubtargetInfo &STI, unsigned FunctionNum,
MachineModuleInfo &MMI);
MachineFunction(const MachineFunction &) = delete;
@ -436,7 +436,7 @@ public:
unsigned getFunctionNumber() const { return FunctionNumber; }
/// getTarget - Return the target machine this machine code is compiled with
const TargetMachine &getTarget() const { return Target; }
const LLVMTargetMachine &getTarget() const { return Target; }
/// getSubtarget - Return the subtarget for which this machine code is being
/// compiled.

6
include/llvm/CodeGen/RegisterUsageInfo.h
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@ -29,7 +29,7 @@
namespace llvm {
class Function;
class TargetMachine;
class LLVMTargetMachine;
class PhysicalRegisterUsageInfo : public ImmutablePass {
public:
@ -41,7 +41,7 @@ public:
}
/// Set TargetMachine which is used to print analysis.
void setTargetMachine(const TargetMachine &TM);
void setTargetMachine(const LLVMTargetMachine &TM);
bool doInitialization(Module &M) override;
@ -63,7 +63,7 @@ private:
/// and 1 means content of register will be preserved around function call.
DenseMap<const Function *, std::vector<uint32_t>> RegMasks;
const TargetMachine *TM;
const LLVMTargetMachine *TM;
};
} // end namespace llvm

6
include/llvm/CodeGen/ScheduleDAG.h
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@ -33,15 +33,15 @@
namespace llvm {
template<class Graph> class GraphWriter;
class LLVMTargetMachine;
class MachineFunction;
class MachineRegisterInfo;
class MCInstrDesc;
struct MCSchedClassDesc;
class ScheduleDAG;
class SDNode;
class SUnit;
class ScheduleDAG;
class TargetInstrInfo;
class TargetMachine;
class TargetRegisterClass;
class TargetRegisterInfo;
@ -558,7 +558,7 @@ class TargetRegisterInfo;
class ScheduleDAG {
public:
const TargetMachine &TM; ///< Target processor
const LLVMTargetMachine &TM; ///< Target processor
const TargetInstrInfo *TII; ///< Target instruction information
const TargetRegisterInfo *TRI; ///< Target processor register info
MachineFunction &MF; ///< Machine function

3
lib/CodeGen/MachineFunction.cpp
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@ -130,7 +130,8 @@ static inline unsigned getFnStackAlignment(const TargetSubtargetInfo *STI,
return STI->getFrameLowering()->getStackAlignment();
}
MachineFunction::MachineFunction(const Function &F, const TargetMachine &Target,
MachineFunction::MachineFunction(const Function &F,
const LLVMTargetMachine &Target,
const TargetSubtargetInfo &STI,
unsigned FunctionNum, MachineModuleInfo &mmi)
: F(F), Target(Target), STI(&STI), Ctx(mmi.getContext()), MMI(mmi) {

2
lib/CodeGen/RegUsageInfoCollector.cpp
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@ -81,7 +81,7 @@ FunctionPass *llvm::createRegUsageInfoCollector() {
bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
MachineRegisterInfo *MRI = &MF.getRegInfo();
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
const TargetMachine &TM = MF.getTarget();
const LLVMTargetMachine &TM = MF.getTarget();
LLVM_DEBUG(dbgs() << " -------------------- " << getPassName()
<< " -------------------- \n");

2
lib/CodeGen/RegisterUsageInfo.cpp
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@ -40,7 +40,7 @@ INITIALIZE_PASS(PhysicalRegisterUsageInfo, "reg-usage-info",
char PhysicalRegisterUsageInfo::ID = 0;
void PhysicalRegisterUsageInfo::setTargetMachine(const TargetMachine &TM) {
void PhysicalRegisterUsageInfo::setTargetMachine(const LLVMTargetMachine &TM) {
this->TM = &TM;
}

2
lib/Target/NVPTX/NVPTXAsmPrinter.cpp
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@ -200,7 +200,7 @@ bool NVPTXAsmPrinter::lowerImageHandleOperand(const MachineInstr *MI,
void NVPTXAsmPrinter::lowerImageHandleSymbol(unsigned Index, MCOperand &MCOp) {
// Ewwww
TargetMachine &TM = const_cast<TargetMachine&>(MF->getTarget());
LLVMTargetMachine &TM = const_cast<LLVMTargetMachine&>(MF->getTarget());
NVPTXTargetMachine &nvTM = static_cast<NVPTXTargetMachine&>(TM);
const NVPTXMachineFunctionInfo *MFI = MF->getInfo<NVPTXMachineFunctionInfo>();
const char *Sym = MFI->getImageHandleSymbol(Index);