changes to make it compatible with 64bit gcc

llvm-svn: 2786
This commit is contained in:
Anand Shukla 2002-06-25 20:22:25 +00:00
parent 5f86b721b3
commit bddcd163a1
9 changed files with 16 additions and 14 deletions

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@ -52,7 +52,7 @@ protected:
void destroy() const;
// printValue - Overridden by template class to print out the value type...
virtual void printValue(ostream &o) const = 0;
virtual void printValue(std::ostream &o) const = 0;
// hasSomeData - Return true if some data has been aquired. Avoid printing
// lots of zero counts.
@ -65,7 +65,7 @@ template <typename DataType=unsigned>
class Statistic : private StatisticBase {
DataType Value;
virtual void printValue(ostream &o) const { o << Value; }
virtual void printValue(std::ostream &o) const { o << Value; }
virtual bool hasSomeData() const { return Value != DataType(); }
public:
// Normal constructor, default initialize data item...

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@ -52,7 +52,7 @@ protected:
void destroy() const;
// printValue - Overridden by template class to print out the value type...
virtual void printValue(ostream &o) const = 0;
virtual void printValue(std::ostream &o) const = 0;
// hasSomeData - Return true if some data has been aquired. Avoid printing
// lots of zero counts.
@ -65,7 +65,7 @@ template <typename DataType=unsigned>
class Statistic : private StatisticBase {
DataType Value;
virtual void printValue(ostream &o) const { o << Value; }
virtual void printValue(std::ostream &o) const { o << Value; }
virtual bool hasSomeData() const { return Value != DataType(); }
public:
// Normal constructor, default initialize data item...

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@ -167,8 +167,8 @@ public:
typedef ilist_iterator<const NodeTy> const_iterator;
typedef size_t size_type;
typedef ptrdiff_t difference_type;
typedef reverse_iterator<const_iterator> const_reverse_iterator;
typedef reverse_iterator<iterator> reverse_iterator;
typedef std::reverse_iterator<const_iterator> const_reverse_iterator;
typedef std::reverse_iterator<iterator> reverse_iterator;
iplist() : Head(createNode()), Tail(Head) {
setNext(Head, 0);

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@ -73,6 +73,7 @@ public:
// operator< - Allow insertion into a map...
bool operator<(const PointerValSet &PVS) const;
bool operator==(const PointerValSet &PVS) const;
bool operator!=(const PointerValSet &PVS) const { return !operator==(PVS); }
const PointerVal &operator[](unsigned i) const { return Vals[i]; }

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@ -12,10 +12,10 @@
#include "llvm/Bytecode/Writer.h"
class WriteBytecodePass : public Pass {
ostream *Out; // ostream to print on
std::ostream *Out; // ostream to print on
bool DeleteStream;
public:
inline WriteBytecodePass(ostream *o = &cout, bool DS = false)
inline WriteBytecodePass(std::ostream *o = &std::cout, bool DS = false)
: Out(o), DeleteStream(DS) {
}

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@ -30,7 +30,7 @@ extern void GetInstructionsByRule (InstructionNode* subtreeRoot,
int ruleForNode,
short* nts,
TargetMachine &Target,
vector<MachineInstr*>& mvec);
std::vector<MachineInstr*>& mvec);
extern bool ThisIsAChainRule (int eruleno);

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@ -62,7 +62,7 @@ public:
class CallArgsDescriptor: public Annotation { // Annotation for a MachineInstr
private:
static AnnotationID AID; // AnnotationID for this class
vector<CallArgInfo> argInfoVec; // Descriptor for each argument
std::vector<CallArgInfo> argInfoVec; // Descriptor for each argument
const CallInst* callInstr; // The call instruction == result value
const Value* funcPtr; // Pointer for indirect calls
TmpInstruction* retAddrReg; // Tmp value for return address reg.

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@ -144,16 +144,16 @@ public:
// necessary.
//
virtual void cpReg2RegMI(unsigned SrcReg, unsigned DestReg,
int RegType, vector<MachineInstr*>& mvec) const = 0;
int RegType, std::vector<MachineInstr*>& mvec) const = 0;
virtual void cpReg2MemMI(unsigned SrcReg, unsigned DestPtrReg, int Offset,
int RegTypee, vector<MachineInstr*>& mvec) const=0;
int RegTypee, std::vector<MachineInstr*>& mvec) const=0;
virtual void cpMem2RegMI(unsigned SrcPtrReg, int Offset, unsigned DestReg,
int RegTypee, vector<MachineInstr*>& mvec) const=0;
int RegTypee, std::vector<MachineInstr*>& mvec) const=0;
virtual void cpValue2Value(Value *Src, Value *Dest,
vector<MachineInstr*>& mvec) const = 0;
std::vector<MachineInstr*>& mvec) const = 0;
virtual bool isRegVolatile(int RegClassID, int Reg) const = 0;

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@ -14,6 +14,7 @@
#include "llvm/Annotation.h"
#include "llvm/AbstractTypeUser.h"
#include "Support/Casting.h"
#include <ostream>
class User;
class Type;