[Constants] add identity constants for fadd/fmul

As the test diffs show, the current users of getBinOpIdentity()
are InstCombine and Reassociate. SLP vectorizer is a candidate
for using this functionality too (D28907).

The InstCombine shuffle improvements are part of the planned
enhancements noted in D48830.

InstCombine actually has several other uses of getBinOpIdentity() 
via SimplifyUsingDistributiveLaws(), but we don't call that for 
any FP ops. Fixing that might be another part of removing the
custom reassociation in InstCombine that is only done for fadd+fmul.

llvm-svn: 336215
This commit is contained in:
Sanjay Patel 2018-07-03 17:12:59 +00:00
parent 8d71b4c306
commit bdfc397f33
4 changed files with 15 additions and 15 deletions

View File

@ -2281,7 +2281,12 @@ Constant *ConstantExpr::getBinOpIdentity(unsigned Opcode, Type *Ty) {
case Instruction::And:
return Constant::getAllOnesValue(Ty);
// FIXME: FAdd / FMul?
// TODO: If the fadd has 'nsz', should we return +0.0?
case Instruction::FAdd:
return ConstantFP::getNegativeZero(Ty);
case Instruction::FMul:
return ConstantFP::get(Ty, 1.0);
}
}

View File

@ -163,8 +163,7 @@ define <4 x i32> @srem(<4 x i32> %v) {
define <4 x float> @fadd(<4 x float> %v) {
; CHECK-LABEL: @fadd(
; CHECK-NEXT: [[B:%.*]] = fadd <4 x float> [[V:%.*]], <float 4.100000e+01, float 4.200000e+01, float 4.300000e+01, float 4.400000e+01>
; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[B]], <4 x float> [[V]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
; CHECK-NEXT: [[S:%.*]] = fadd <4 x float> [[V:%.*]], <float 4.100000e+01, float 4.200000e+01, float -0.000000e+00, float -0.000000e+00>
; CHECK-NEXT: ret <4 x float> [[S]]
;
%b = fadd <4 x float> %v, <float 41.0, float 42.0, float 43.0, float 44.0>
@ -187,8 +186,7 @@ define <4 x double> @fsub(<4 x double> %v) {
define <4 x float> @fmul(<4 x float> %v) {
; CHECK-LABEL: @fmul(
; CHECK-NEXT: [[B:%.*]] = fmul nnan ninf <4 x float> [[V:%.*]], <float 4.100000e+01, float 4.200000e+01, float 4.300000e+01, float 4.400000e+01>
; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[B]], <4 x float> [[V]], <4 x i32> <i32 0, i32 5, i32 6, i32 7>
; CHECK-NEXT: [[S:%.*]] = fmul nnan ninf <4 x float> [[V:%.*]], <float 4.100000e+01, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
; CHECK-NEXT: ret <4 x float> [[S]]
;
%b = fmul nnan ninf <4 x float> %v, <float 41.0, float 42.0, float 43.0, float 44.0>

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@ -48,7 +48,7 @@ define i8 @xor_0(i8 %x) {
ret i8 %a2
}
; FIXME
; FIXME - the binop identity constant for fadd is -0.0, so this didn't fold.
define float @fadd_0(float %x) {
; CHECK-LABEL: @fadd_0(
@ -60,12 +60,9 @@ define float @fadd_0(float %x) {
ret float %a2
}
; FIXME
define float @fmul_1(float %x) {
; CHECK-LABEL: @fmul_1(
; CHECK-NEXT: [[A2:%.*]] = fmul fast float [[X:%.*]], 1.000000e+00
; CHECK-NEXT: ret float [[A2]]
; CHECK-NEXT: ret float [[X:%.*]]
;
%a1 = fmul fast float %x, 4.0
%a2 = fmul fast float %a1, 0.25

View File

@ -1,11 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -reassociate -S | FileCheck %s
; Input is A op (B op C)
define half @faddsubAssoc1(half %a, half %b) {
; CHECK-LABEL: @faddsubAssoc1(
; CHECK-NEXT: [[T2_NEG:%.*]] = fmul fast half %a, 0xH4500
; CHECK-NEXT: [[REASS_MUL:%.*]] = fmul fast half %b, 0xH4500
; CHECK-NEXT: [[T2_NEG:%.*]] = fmul fast half [[A:%.*]], 0xH4500
; CHECK-NEXT: [[REASS_MUL:%.*]] = fmul fast half [[B:%.*]], 0xH4500
; CHECK-NEXT: [[T51:%.*]] = fsub fast half [[REASS_MUL]], [[T2_NEG]]
; CHECK-NEXT: [[T5:%.*]] = fadd fast half [[REASS_MUL]], [[T2_NEG]]
; CHECK-NEXT: ret half [[T51]]
@ -22,9 +23,8 @@ define half @faddsubAssoc1(half %a, half %b) {
define half @faddsubAssoc2(half %a, half %b) {
; CHECK-LABEL: @faddsubAssoc2(
; CHECK-NEXT: [[T2:%.*]] = fmul fast half %a, 0xH4500
; CHECK-NEXT: [[REASS_MUL:%.*]] = fmul fast half %b, 0xH3C00
; CHECK-NEXT: [[T5:%.*]] = fadd fast half [[REASS_MUL]], [[T2]]
; CHECK-NEXT: [[T2:%.*]] = fmul fast half [[A:%.*]], 0xH4500
; CHECK-NEXT: [[T5:%.*]] = fadd fast half [[B:%.*]], [[T2]]
; CHECK-NEXT: ret half [[T5]]
;
%t1 = fmul fast half %b, 0xH4200 ; 3*b