RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-04-08 02:31:41 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

It's "necessary" to spell "necessarily" correctly.

Browse Source 
llvm-svn: 5833
This commit is contained in:
Misha Brukman 2003-04-22 17:54:23 +00:00
parent b315dbe98a
commit c06beb4c03
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/X86/InstSelectSimple.cpp
View File

@ -1209,7 +1209,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) {
// Emit the byte swap instruction... // Emit the byte swap instruction...
switch (Class) { switch (Class) {
case cByte: case cByte:
// No byteswap neccesary for 8 bit value... // No byteswap necessary for 8 bit value...
BuildMI(BB, X86::MOVrr8, 1, DestReg).addReg(SrcReg); BuildMI(BB, X86::MOVrr8, 1, DestReg).addReg(SrcReg);
break; break;
case cInt: case cInt:
@ -1219,7 +1219,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) {
case cShort: case cShort:
// For 16 bit we have to use an xchg instruction, because there is no // For 16 bit we have to use an xchg instruction, because there is no
// 16-bit bswap. XCHG is neccesarily not in SSA form, so we force things // 16-bit bswap. XCHG is necessarily not in SSA form, so we force things
// into AX to do the xchg. // into AX to do the xchg.
// //
BuildMI(BB, X86::MOVrr16, 1, X86::AX).addReg(SrcReg); BuildMI(BB, X86::MOVrr16, 1, X86::AX).addReg(SrcReg);